linux-kernel - [PATCH 0/3] Enable myphy28lp support

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Date:	Wed, 14 Jan 2015 10:54:56 +0100
From:	Gabriel FERNANDEZ <gabriel.fernandez@...com>
To:	Rob Herring <robh+dt@...nel.org>, Pawel Moll <pawel.moll@....com>,
	Mark Rutland <mark.rutland@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Srinivas Kandagatla <srinivas.kandagatla@...il.com>,
	Maxime Coquelin <maxime.coquelin@...com>,
	Patrice Chotard <patrice.chotard@...com>,
	Russell King <linux@....linux.org.uk>,
	Kishon Vijay Abraham I <kishon@...com>,
	Grant Likely <grant.likely@...aro.org>
Cc:	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, kernel@...inux.com,
	Lee Jones <lee.jones@...aro.org>,
	Gabriel Fernandez <gabriel.fernandez@...aro.org>
Subject: [PATCH 0/3] Enable myphy28lp support

The goal of this series is to enable the support of MiPHY28lp Generic PHY.

The first patch is to update miphy28lp phy driver to access sysconfig register
offsets via syscfg dt property. It's based on Arnds review comments here
https://lkml.org/lkml/2014/11/13/161
I have updated the miphy28lp phy driver same way as Peter's implementation.

Gabriel Fernandez (3):
  phy: miphy28lp: Pass sysconfig register offsets via syscfg dt
    property.
  ARM: DT: STi: STiH407: Add DT node for MiPHY28lp
  ARM: multi_v7_defconfig: Enable MiPHY28lp - ST's Generic (SATA, PCIe &
    USB3) PHY

 .../devicetree/bindings/phy/phy-miphy28lp.txt      | 43 ++++++---------
 arch/arm/boot/dts/stih407-family.dtsi              | 53 +++++++++++++++++++
 arch/arm/boot/dts/stihxxx-b2120.dtsi               | 11 ++++
 arch/arm/configs/multi_v7_defconfig                |  1 +
 drivers/phy/phy-miphy28lp.c                        | 61 ++++++++++++----------
 5 files changed, 113 insertions(+), 56 deletions(-)

-- 
1.9.1

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