linux-kernel - Re: [PATCH resend v5 0/6] KVM: nVMX: Enable nested apicv support

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Date:	Tue, 03 Feb 2015 17:15:58 +0100
From:	Paolo Bonzini <pbonzini@...hat.com>
To:	Wincy Van <fanwenyi0529@...il.com>, gleb@...nel.org,
	yang.z.zhang@...el.com
CC:	wanpeng.li@...ux.intel.com, kvm@...r.kernel.org,
	linux-kernel@...r.kernel.org, jan.kiszka@....de
Subject: Re: [PATCH resend v5 0/6] KVM: nVMX: Enable nested apicv support



On 03/02/2015 16:46, Wincy Van wrote:
> v1 ---> v2:
>   Use spin lock to ensure vmcs12 is safe when doing nested
>   posted interrupt delivery.
> 
> v2 ---> v3:
>   1. Add a new field in nested_vmx to avoid the spin lock in v2.
>   2. Drop send eoi to L1 when doing nested interrupt delivery.
>   3. Use hardware MSR bitmap to enable nested virtualize x2apic
>      mode.
> 
> v3 ---> v4:
>   1. Optimize nested msr bitmap merging.
>   2. Allocate nested msr bitmap only when nested == 1.
>   3. Inline the nested vmx control checking functions.
> 
> v4 ---> v5:
>   1. Move EXIT_REASON_APIC_WRITE to the apic register
>      virtualization patch.
>   2. Accomplish nested posted interrupts manually if
>      they are not recognized by hardware.

Thanks, will apply soon to kvm/queue.

Paolo

> Wincy Van (6):
>   KVM: nVMX: Use hardware MSR bitmap
>   KVM: nVMX: Enable nested virtualize x2apic mode
>   KVM: nVMX: Make nested control MSRs per-cpu
>   KVM: nVMX: Enable nested apic register virtualization
>   KVM: nVMX: Enable nested virtual interrupt delivery
>   KVM: nVMX: Enable nested posted interrupt processing
> 
>  arch/x86/kvm/lapic.c |   13 +-
>  arch/x86/kvm/lapic.h |    1 +
>  arch/x86/kvm/vmx.c   |  647 ++++++++++++++++++++++++++++++++++++++++++--------
>  3 files changed, 557 insertions(+), 104 deletions(-)
> 
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