linux-kernel - Re: [PATCH v3 2/2] dma: Add Xilinx AXI Central Direct Memory Access Engine driver support

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:	Tue, 24 Mar 2015 21:59:17 +0530
From:	Vinod Koul <vinod.koul@...el.com>
To:	Appana Durga Kedareswara Rao <appana.durga.rao@...inx.com>
Cc:	Appana Durga Kedareswara Rao <appanad@...inx.com>,
	"dan.j.williams@...el.com" <dan.j.williams@...el.com>,
	Michal Simek <michals@...inx.com>,
	Soren Brinkmann <sorenb@...inx.com>,
	"dmaengine@...r.kernel.org" <dmaengine@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Anirudha Sarangi <anirudh@...inx.com>,
	Srikanth Vemula <svemula@...inx.com>,
	Srikanth Thokala <sthokal@...inx.com>
Subject: Re: [PATCH v3 2/2] dma: Add Xilinx AXI Central Direct Memory Access
 Engine driver support

On Mon, Mar 23, 2015 at 04:27:54PM +0000, Appana Durga Kedareswara Rao wrote:
> Ping !
> 
> > -----Original Message-----
> > From: Kedareswara rao Appana [mailto:appana.durga.rao@...inx.com]
> > Sent: Monday, March 02, 2015 11:25 PM
> > To: dan.j.williams@...el.com; vinod.koul@...el.com; Michal Simek; Soren
> > Brinkmann
> > Cc: dmaengine@...r.kernel.org; linux-arm-kernel@...ts.infradead.org; linux-
> > kernel@...r.kernel.org; Appana Durga Kedareswara Rao; Anirudha Sarangi;
> > Srikanth Vemula; Srikanth Thokala
> > Subject: [PATCH v3 2/2] dma: Add Xilinx AXI Central Direct Memory Access
> > Engine driver support
> >
> > This is the driver for the AXI Central Direct Memory Access (AXI
> > CDMA) core, which is a soft Xilinx IP core that provides high-bandwidth Direct
> > Memory Access (DMA) between a memory-mapped source address and a
> > memory-mapped destination address.
Somehow I dont seem to have this in my queue, so can you please resend this
one for me

-- 
~Vinod

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/