lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Sun, 19 Apr 2015 00:28:39 +0200
From:	Jonas Gorski <jogo@...nwrt.org>
To:	Alban Bedel <albeu@...e.fr>
Cc:	MIPS Mailing List <linux-mips@...ux-mips.org>,
	Ralf Baechle <ralf@...ux-mips.org>,
	Andrew Bresticker <abrestic@...omium.org>,
	Qais Yousef <qais.yousef@...tec.com>,
	Wolfram Sang <wsa@...-dreams.de>,
	Sergey Ryazanov <ryazanov.s.a@...il.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 4/5] MIPS: ath79: Fix the PCI memory size and offset of
 window 7

Hi,

On Fri, Apr 17, 2015 at 2:36 PM, Alban Bedel <albeu@...e.fr> wrote:
> The define AR71XX_PCI_MEM_SIZE miss one window, there is 7 windows,
> not 6. To make things clearer, and allow simpler code, derive
> AR71XX_PCI_MEM_SIZE from the newly introduced AR71XX_PCI_WIN_COUNT
> and AR71XX_PCI_WIN_SIZE.
>
> The define AR71XX_PCI_WIN7_OFFS also add a typo, fix it.

I think this will break PCI on ar71xx.

>
> Signed-off-by: Alban Bedel <albeu@...e.fr>
> ---
>  arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
> index aa3800c..e2669a8 100644
> --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
> +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
> @@ -41,7 +41,9 @@
>  #define AR71XX_RESET_SIZE      0x100
>
>  #define AR71XX_PCI_MEM_BASE    0x10000000
> -#define AR71XX_PCI_MEM_SIZE    0x07000000
> +#define AR71XX_PCI_WIN_COUNT   8
> +#define AR71XX_PCI_WIN_SIZE    0x01000000
> +#define AR71XX_PCI_MEM_SIZE    (AR71XX_PCI_WIN_COUNT * AR71XX_PCI_WIN_SIZE)
>
>  #define AR71XX_PCI_WIN0_OFFS   0x10000000
>  #define AR71XX_PCI_WIN1_OFFS   0x11000000
> @@ -50,7 +52,7 @@
>  #define AR71XX_PCI_WIN4_OFFS   0x14000000
>  #define AR71XX_PCI_WIN5_OFFS   0x15000000
>  #define AR71XX_PCI_WIN6_OFFS   0x16000000
> -#define AR71XX_PCI_WIN7_OFFS   0x07000000
> +#define AR71XX_PCI_WIN7_OFFS   0x17000000

These values are used in exactly one place, for writing into the PCI
address space offset registers.
The 7th PCI window is a special one for accessing the configuration
space registers, which requires to be set to 0x07000000 for that
purpose. So by changing this value you likely break access to these
values.

>
>  #define AR71XX_PCI_CFG_BASE    \
>         (AR71XX_PCI_MEM_BASE + AR71XX_PCI_WIN7_OFFS + 0x10000)

Also this macro would now be wrong, and calculate a wrong address.


Regards
Jonas
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ