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Date:	Thu, 23 Apr 2015 09:12:38 -0500 (CDT)
From:	Christoph Lameter <cl@...ux.com>
To:	"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>
cc:	Jerome Glisse <j.glisse@...il.com>, linux-kernel@...r.kernel.org,
	linux-mm@...ck.org, jglisse@...hat.com, mgorman@...e.de,
	aarcange@...hat.com, riel@...hat.com, airlied@...hat.com,
	benh@...nel.crashing.org, aneesh.kumar@...ux.vnet.ibm.com,
	Cameron Buschardt <cabuschardt@...dia.com>,
	Mark Hairgrove <mhairgrove@...dia.com>,
	Geoffrey Gerfin <ggerfin@...dia.com>,
	John McKenna <jmckenna@...dia.com>, akpm@...ux-foundation.org
Subject: Re: Interacting with coherent memory on external devices

On Wed, 22 Apr 2015, Paul E. McKenney wrote:

> Agreed, the use case that Jerome is thinking of differs from yours.
> You would not (and should not) tolerate things like page faults because
> it would destroy your worst-case response times.  I believe that Jerome
> is more interested in throughput with minimal change to existing code.

As far as I know Jerome is talkeing about HPC loads and high performance
GPU processing. This is the same use case.

> Let's suppose that you and Jerome were using GPGPU hardware that had
> 32,768 hardware threads.  You would want very close to 100% of the full
> throughput out of the hardware with pretty much zero unnecessary latency.
> In contrast, Jerome might be OK with (say) 20,000 threads worth of
> throughput with the occasional latency hiccup.
>
> And yes, support for both use cases is needed.

What you are proposing for High Performacne Computing is reducing the
performance these guys trying to get. You cannot sell someone a Volkswagen
if he needs the Ferrari.

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