linux-kernel - Re: Thunderbolt hotplug not working on MacMini7,1

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Date:	Fri, 24 Apr 2015 13:41:25 +0200
From:	Andreas Noever <andreas.noever@...il.com>
To:	Matthew Garrett <mjg59@...f.ucam.org>
Cc:	Adam Goode <adam@...cenitz.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: Thunderbolt hotplug not working on MacMini7,1

On Thu, Apr 23, 2015 at 8:12 PM, Matthew Garrett <mjg59@...f.ucam.org> wrote:
> On Thu, Apr 23, 2015 at 12:08:01PM +0200, Andreas Noever wrote:
>> Hi Adam,
>>
>> On my system (MacBookPro10,1 - 4 channel TB1) the bridges and the
>> controller both use 0x1547 and are only differentiated by
>> subvendor/subdevice.
>
> Do they have the same PCI class?
No, 0604 for the bridges and 0880 for the device.

It looks like the only reason that the bridges do not have a
subsystem/subvendor set is because there is no such field in the pci
bridge header. Instead they put 2222:1111 into the SSVID capability:

06:06.0 PCI bridge [0604]: Intel Corporation Unknown device
[8086:1547] (rev 03) (prog-if 00 [Normal decode])
Flags: bus master, fast devsel, latency 0
Bus: primary=06, secondary=08, subordinate=08, sec-latency=0
Capabilities: [80] Power Management version 3
Capabilities: [88] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable+
Capabilities: [ac] Subsystem: Unknown device [2222:1111]
Capabilities: [c0] Express Downstream Port (Slot+), MSI 00
Capabilities: [100] #8086

07:00.0 System peripheral [0880]: Intel Corporation Unknown device
[8086:1547] (rev 03)
Subsystem: Unknown device [2222:1111]
Flags: bus master, fast devsel, latency 0, IRQ 17
Memory at c1d00000 (32-bit, non-prefetchable)
Memory at c1d40000 (32-bit, non-prefetchable)
Capabilities: [80] Power Management version 3
Capabilities: [88] Message Signalled Interrupts: Mask- 64bit+ Queue=0/0 Enable+
Capabilities: [ac] Subsystem: Unknown device [2222:1111]
Capabilities: [c0] Express Endpoint, MSI 00
Capabilities: [a0] MSI-X: Enable- Mask- TabSize=16
Capabilities: [100] #8086

pci_setup_device actually reads this capability and puts it into
dev->subsystem_vendor/device. So we might actually get bound to the
bridges (if the pcieport driver is unavailable). I'll post a patch to
bind to the class code instead. Good idea!

Andreas
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