lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Wed, 6 May 2015 16:18:17 +0200
From:	Thierry Reding <thierry.reding@...il.com>
To:	Benson Leung <bleung@...omium.org>
Cc:	Rhyland Klein <rklein@...dia.com>,
	Peter De Schrijver <pdeschrijver@...dia.com>,
	Mike Turquette <mturquette@...aro.org>,
	Stephen Warren <swarren@...dotorg.org>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Alexandre Courbot <gnurou@...il.com>,
	linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Bill Huang <bilhuang@...dia.com>
Subject: Re: [PATCH v4 06/20] clk: tegra: pll-params: change misc_reg count
 from 3 -> 6

On Mon, May 04, 2015 at 01:35:09PM -0700, Benson Leung wrote:
> On Mon, May 4, 2015 at 9:37 AM, Rhyland Klein <rklein@...dia.com> wrote:
> > From: Bill Huang <bilhuang@...dia.com>
> >
> > New SoC's may have more then 3 MISC registers, so bump up the
> > array size and use a #define to be more informative about the value.
> >
> > Signed-off-by: Bill Huang <bilhuang@...dia.com>
> > ---
> >  drivers/clk/tegra/clk.h |    4 +++-
> >  1 file changed, 3 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/clk/tegra/clk.h b/drivers/clk/tegra/clk.h
> > index 5759b8bfb80e..8e7361886cf9 100644
> > --- a/drivers/clk/tegra/clk.h
> > +++ b/drivers/clk/tegra/clk.h
> > @@ -156,6 +156,8 @@ struct div_nmp {
> >         u8              override_divp_shift;
> >  };
> >
> > +#define MAX_PLL_MISC_REG_COUNT 6
> > +
> >  /**
> >   * struct clk_pll_params - PLL parameters
> >   *
> > @@ -213,7 +215,7 @@ struct tegra_clk_pll_params {
> >         u32             iddq_bit_idx;
> >         u32             aux_reg;
> >         u32             dyn_ramp_reg;
> > -       u32             ext_misc_reg[3];
> > +       u32             ext_misc_reg[MAX_PLL_MISC_REG_COUNT];
> >         u32             pmc_divnm_reg;
> >         u32             pmc_divp_reg;
> >         u32             flags;
> 
> 
> Missing kernel doc above for ext_misc_reg and some other surrounding members.

I added the missing kerneldoc in that patch I sent out earlier. The
problem is preexisting for this field, so doing it in a separate patch
is fine in my opinion.

Thierry

Content of type "application/pgp-signature" skipped

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ