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Date: Thu, 7 May 2015 17:11:11 +0200
From: Thierry Reding <thierry.reding@...il.com>
To: Rhyland Klein <rklein@...dia.com>
Cc: Peter De Schrijver <pdeschrijver@...dia.com>,
Mike Turquette <mturquette@...aro.org>,
Stephen Warren <swarren@...dotorg.org>,
Stephen Boyd <sboyd@...eaurora.org>,
Alexandre Courbot <gnurou@...il.com>,
linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 12/20] clk: tegra: pll: Add specialized logic for T210
On Mon, May 04, 2015 at 12:37:32PM -0400, Rhyland Klein wrote:
[...]
> diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
[...]
> +struct clk *tegra_clk_register_pllxc_tegra210(const char *name,
> + const char *parent_name, void __iomem *clk_base,
> + void __iomem *pmc, unsigned long flags,
> + struct tegra_clk_pll_params *pll_params,
> + spinlock_t *lock)
> +{
> + struct tegra_clk_pll *pll;
> + struct clk *clk, *parent;
> + unsigned long parent_rate;
> + u32 val, val_iddq;
These two variables don't seem to be used.
Thierry
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