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Date:	Thu, 7 May 2015 17:16:51 +0200
From:	Thierry Reding <thierry.reding@...il.com>
To:	Rhyland Klein <rklein@...dia.com>
Cc:	Peter De Schrijver <pdeschrijver@...dia.com>,
	Mike Turquette <mturquette@...aro.org>,
	Stephen Warren <swarren@...dotorg.org>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Alexandre Courbot <gnurou@...il.com>,
	linux-clk@...r.kernel.org, linux-tegra@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v4 19/20] clk: tegra210: add support for Tegra210 clocks

On Wed, May 06, 2015 at 01:21:06PM -0400, Rhyland Klein wrote:
> On 5/6/2015 10:51 AM, Thierry Reding wrote:
> > * PGP Signed by an unknown key
> > 
> > On Mon, May 04, 2015 at 12:37:39PM -0400, Rhyland Klein wrote:
> > [...]
> >> diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c
> > [...]
> >> +static struct div_nmp plld_nmp = {
> >> +	.divm_shift = 0,
> >> +	.divm_width = 8,
> >> +	.divn_shift = 11,
> >> +	.divn_width = 8,
> >> +	.divp_shift = 20,
> >> +	.divp_width = 3,
> >> +};
> > 
> > I think we need to add the SDM shift and width fields here:
> > 
> > 	.sdm_shift = 0,
> > 	.sdm_width = 16,
> > 
> > Otherwise pll_d can't take advantage of the fractional divider.
> > 
> Actually, sdm_shift/width aren't used. I originally added them to handle
> SDM data, but eventually I switched to using a reg/mask combo. So this
> isn't needed.

Right, I hadn't noticed that this had changed from your earlier drafts.

Thierry

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