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Date:	Tue, 16 Jun 2015 05:19:22 +0200
From:	Javier Martinez Canillas <javier.martinez@...labora.co.uk>
To:	Krzysztof Kozlowski <k.kozlowski@...sung.com>,
	Sudeep Holla <sudeep.holla@....com>,
	Doug Anderson <dianders@...omium.org>
CC:	"linux-samsung-soc@...r.kernel.org" 
	<linux-samsung-soc@...r.kernel.org>,
	Jason Cooper <jason@...edaemon.net>,
	Chanho Park <parkch98@...il.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Kukjin Kim <kgene@...nel.org>,
	Peter Chubb <peter.chubb@...ta.com.au>,
	Shuah Khan <shuahkhan@...il.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Tomasz Figa <tomasz.figa@...il.com>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 1/1] irqchip: exynos-combiner: Save IRQ enable set
 on suspend

Hello Krzysztof,

On 06/16/2015 01:57 AM, Krzysztof Kozlowski wrote:
> On 16.06.2015 00:23, Javier Martinez Canillas wrote: (...)
>>>> To do a more intrusive change, I should better understand the
>>>> interactions between the Exynos pinctrl / GPIO, interrupt
>>>> combiner and the GIC and in the meantime S2R will continue to
>>>> be broken on these platforms unless someone more familiar with
>>>> all this could point me in the right direction.
>>>> 
>>> 
>>> As I said I am fine with this patch for now and I don't want to
>>> block it.
>>> 
>> 
>> Thanks a lot, Krzysztof who is one of the Exynos maintainers has
>> also agreed with the patch so hopefully this can land sooner rather
>> than later.
> 
> I assume this will go through irqchip tree, right?
> 

That is my assumption as well. I meant the fact that you as an Exynos
maintainer thinks $subject is a sensible solution to the issue, would
give confidence to the irqchip maintainers to pick this patch soon.

> Best regards, Krzysztof
> 

Best regards,
Javier
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