linux-kernel - Re: [PATCH] ARM64: TTY: hvc_dcc: Add support for ARM64 dcc

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Date:	Mon, 22 Jun 2015 08:16:43 -0500
From:	Timur Tabi <timur@...eaurora.org>
To:	Will Deacon <will.deacon@....com>
CC:	Catalin Marinas <Catalin.Marinas@....com>,
	"abhimany@...eaurora.org" <abhimany@...eaurora.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] ARM64: TTY: hvc_dcc: Add support for ARM64 dcc

Will Deacon wrote:
> On Fri, Jun 19, 2015 at 11:08:54PM +0100, Timur Tabi wrote:
>> From: Abhimanyu Kapur <abhimany@...eaurora.org>
>>
>> Add support for debug communications channel based
>> hvc console for arm64 cpus.
>
> I still think we should be disabling userspace access to the DCC if the
> kernel is using it as its console.

I don't disagree, I just don't know how to do that.

>> + * A call to __dcc_getchar() or __dcc_putchar() is typically followed by
>> + * a call to __dcc_getstatus().  We want to make sure that the CPU does
>> + * not speculative read the DCC status before executing the read or write
>> + * instruction.  That's what the ISBs are for.
>> + *
>> + * The 'volatile' ensures that the compiler does not cache the status bits,
>> + * and instead reads the DCC register every time.
>> + */
>
> Missing header guards.

Will fix.

>> +#include <asm/barrier.h>
>> +
>> +static inline u32 __dcc_getstatus(void)
>> +{
>> +	u32 __ret;
>> +
>> +	asm volatile("mrs %0, mdccsr_el0" : "=r" (__ret)
>> +			: : "cc");
>
> You don't need the "cc" clobber.

Will fix.

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