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Date:	Thu, 25 Jun 2015 22:44:07 +0200
From:	Arnd Bergmann <arnd@...db.de>
To:	Casey Leedom <leedom@...lsio.com>
Cc:	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	"Luis R. Rodriguez" <mcgrof@...e.com>,
	"Michael S. Tsirkin" <mst@...hat.com>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Toshi Kani <toshi.kani@...com>,
	Andy Lutomirski <luto@...capital.net>,
	Juergen Gross <jgross@...e.com>,
	Tomi Valkeinen <tomi.valkeinen@...com>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"xen-devel@...ts.xensource.com" <xen-devel@...ts.xensource.com>,
	linux-fbdev <linux-fbdev@...r.kernel.org>,
	Suresh Siddha <sbsiddha@...il.com>,
	Ingo Molnar <mingo@...e.hu>,
	Thomas Gleixner <tglx@...utronix.de>,
	Daniel Vetter <daniel.vetter@...ll.ch>,
	Dave Airlie <airlied@...hat.com>,
	Antonino Daplas <adaplas@...il.com>,
	Jean-Christophe Plagniol-Villard <plagnioj@...osoft.com>,
	Dave Hansen <dave.hansen@...ux.intel.com>,
	"venkatesh.pallipadi@...el.com" <venkatesh.pallipadi@...el.com>,
	Stefan Bader <stefan.bader@...onical.com>,
	Ville Syrjälä <syrjala@....fi>,
	Mel Gorman <mgorman@...e.de>, Vlastimil Babka <vbabka@...e.cz>,
	Borislav Petkov <bp@...e.de>, Davidlohr Bueso <dbueso@...e.de>,
	Konrad Rzeszutek Wilk <konrad.wilk@...cle.com>,
	Ville Syrjälä 
	<ville.syrjala@...ux.intel.com>,
	David Vrabel <david.vrabel@...rix.com>,
	Jan Beulich <jbeulich@...e.com>,
	Roger Pau Monné <roger.pau@...rix.com>
Subject: Re: [PATCH v7 5/9] PCI: Add pci_iomap_wc() variants

On Thursday 25 June 2015 15:01:56 Casey Leedom wrote:
> 
>   Is there a reference I can read on this so I can understand
> when and where we can use the __raw_*() APIs?  Can these
> Raw Read/Write operations be reordered with respect to
> each other or are the use of the various flavors of SYNC
> instructions just to maintain order between Cached Memory
> Accesses and I/O Instructions?

The interpretation is not consistent across architectures.

My best description would be that the __raw_*() accessors should
only be used for accessing RAM areas that are known to have no
side-effects and can be read in any size (8-bit to 64-bit wide),
any alignment, and do not have a specific endianess.

If you are dealing with MMIO registers that have a fixed endianess
and size, the correct accessor would be readl_relaxed(), which
is like readl() but lacks the barriers on certain architectures.

	Arnd
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