lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:	Fri, 24 Jul 2015 14:26:29 -0700
From:	Stephane Eranian <eranian@...gle.com>
To:	"Liang, Kan" <kan.liang@...el.com>
Cc:	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	"mingo@...hat.com" <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...nel.org>,
	"ak@...ux.intel.com" <ak@...ux.intel.com>,
	LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] perf/x86: Add Intel power cstate PMUs support

On Fri, Jul 24, 2015 at 1:57 PM, Liang, Kan <kan.liang@...el.com> wrote:
>> > + *     MSR_PKG_C6_RESIDENCY:  Package C6 Residency Counter.
>> > + *                            perf code: 0x06
>> > + *                            Available model: NHM,WSM,SNB,IVB,HSW,BDW
>> > + *                            Scope: Package (physical package)
>> > + *     MSR_PKG_C7_RESIDENCY:  Package C7 Residency Counter.
>> > + *                            perf code: 0x07
>> > + *                            Available model: NHM,WSM,SNB,IVB,HSW,BDW
>> > + *                            Scope: Package (physical package)
>> > + *     MSR_PKG_C8_RESIDENCY:  Package C8 Residency Counter.
>> > + *                            perf code: 0x08
>> > + *                            Available model: HSW ULT only
>> > + *                            Scope: Package (physical package)
>> > + *     MSR_PKG_C9_RESIDENCY:  Package C9 Residency Counter.
>> > + *                            perf code: 0x09
>> > + *                            Available model: HSW ULT only
>> > + *                            Scope: Package (physical package)
>> > + *     MSR_PKG_C10_RESIDENCY: Package C10 Residency Counter.
>> > + *                            perf code: 0x0a
>> > + *                            Available model: HSW ULT only
>> > + *                            Scope: Package (physical package)
>> > + *     MSR_SLM_PKG_C6_RESIDENCY: Package C6 Residency Counter for
>> SLM.
>> > + *                            perf code: 0x0b
>> > + *                            Available model: SLM,AMT
>> > + *                            Scope: Package (physical package)
>> > + *
>> > + */
>> > +
>> Why would the user (and the tools) have to change the event code to
>> measure,  let's say C6 residency, between SLM (0xb) and and BDW (0x6)?
>> Are they not measuring the same thing?
>>
>
> Yes, they are measuring the same thing, but with different MSR.
> I will make their event code consistent and special handle PKG_C6
> in event_init in next version.
>
The user should not be concerned with the MSR mapping. The user should
only see the event name and understand what it measures. The kernel should
take care of mapping the event to the correct MSR as per perf_events design.

>
> Thanks,
> Kan
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ