linux-kernel - [PATCH v1 5/5] ARM: dts: rockchip: add eFuse config of rk3288 SoC

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Date:	Tue, 11 Aug 2015 14:15:06 +0800
From:	Shunqian Zheng <zhengsq@...k-chips.com>
To:	gregkh@...uxfoundation.org, srinivas.kandagatla@...aro.org,
	maxime.ripard@...e-electrons.com, heiko@...ech.de,
	caesar.wang@...k-chips.com
Cc:	dianders@...omium.org, linux-rockchip@...ts.infradead.org,
	linux-kernel@...r.kernel.org, xjq@...k-chips.com,
	ZhengShunQian <zhengsq@...k-chips.com>
Subject: [PATCH v1 5/5] ARM: dts: rockchip: add eFuse config of rk3288 SoC

From: ZhengShunQian <zhengsq@...k-chips.com>

This patch add the eFuse dt config of rk3288 SoC.

Signed-off-by: ZhengShunQian <zhengsq@...k-chips.com>
---
 arch/arm/boot/dts/rk3288.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 2db91c9..4632e0d 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -749,6 +749,19 @@
 		interrupts = <GIC_PPI 9 0xf04>;
 	};
 
+	efuse: efuse@...40000 {
+		compatible = "rockchip,rockchip-efuse";
+		reg = <0xffb40000 0x20>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		clocks = <&cru PCLK_EFUSE256>;
+		clock-names = "pclk_efuse";
+
+		cpu_leakage: cpu_leakage {
+			reg = <0x17 0x1>;
+		};
+	};
+
 	usbphy: phy {
 		compatible = "rockchip,rk3288-usb-phy";
 		rockchip,grf = <&grf>;
-- 
1.9.1

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