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Date:	Thu, 13 Aug 2015 17:44:38 -0400
From:	Hai Li <hali@...eaurora.org>
To:	dri-devel@...ts.freedesktop.org
Cc:	linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
	robdclark@...il.com, Hai Li <hali@...eaurora.org>
Subject: [PATCH] rnndb/dsi: Add more bits for DSI PHY

More registers and bit fields are added for PHY timings
and bitclk source selection.

Signed-off-by: Hai Li <hali@...eaurora.org>
---
 rnndb/dsi/dsi.xml | 11 +++++++++--
 1 file changed, 9 insertions(+), 2 deletions(-)

diff --git a/rnndb/dsi/dsi.xml b/rnndb/dsi/dsi.xml
index 02cfa3b..956f3ff 100644
--- a/rnndb/dsi/dsi.xml
+++ b/rnndb/dsi/dsi.xml
@@ -217,6 +217,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 	<reg32 offset="0x00128" name="PHY_RESET">
 		<bitfield name="RESET" pos="0" type="boolean"/>
 	</reg32>
+	<reg32 offset="0x0017c" name="T_CLK_PRE_EXTEND">
+		<bitfield name="INC_BY_2_BYTECLK" pos="0" type="boolean"/>
+	</reg32>
 	<reg32 offset="0x001d0" name="RDBK_DATA_CTRL">
 		<bitfield name="COUNT" low="16" high="23" type="uint"/>
 		<bitfield name="CLR" pos="0" type="boolean"/>
@@ -437,7 +440,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 	<reg32 offset="0x001c4" name="BIST_CTRL_4"/>
 	<reg32 offset="0x001c8" name="BIST_CTRL_5"/>
 
-	<reg32 offset="0x001d4" name="GLBL_TEST_CTRL"/>
+	<reg32 offset="0x001d4" name="GLBL_TEST_CTRL">
+		<bitfield name="BITCLK_HS_SEL" pos="0" type="boolean"/>
+	</reg32>
 	<reg32 offset="0x001dc" name="LDO_CNTRL"/>
 </domain>
 
@@ -608,7 +613,9 @@ xsi:schemaLocation="http://nouveau.freedesktop.org/ rules-ng.xsd">
 	<reg32 offset="0x001c4" name="BIST_CTRL_4"/>
 	<reg32 offset="0x001c8" name="BIST_CTRL_5"/>
 
-	<reg32 offset="0x001d4" name="GLBL_TEST_CTRL"/>
+	<reg32 offset="0x001d4" name="GLBL_TEST_CTRL">
+		<bitfield name="BITCLK_HS_SEL" pos="0" type="boolean"/>
+	</reg32>
 	<reg32 offset="0x001dc" name="LDO_CNTRL"/>
 </domain>
 
-- 
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