linux-kernel - Re: [PATCH 1/3] ARM: uniphier: add outer cache support

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Date:	Sun, 23 Aug 2015 19:29:19 -0700
From:	Joe Perches <joe@...ches.com>
To:	Masahiro Yamada <yamada.masahiro@...ionext.com>
Cc:	arm@...nel.org, Arnd Bergmann <arnd@...db.de>,
	Jiri Slaby <jslaby@...e.com>,
	Linus Walleij <linus.walleij@...aro.org>,
	Kumar Gala <galak@...eaurora.org>,
	Jungseung Lee <js07.lee@...il.com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Rob Herring <robh+dt@...nel.org>, Tejun Heo <tj@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Florian Fainelli <f.fainelli@...il.com>,
	Maxime Coquelin <mcoquelin.stm32@...il.com>,
	Andrew Morton <akpm@...ux-foundation.org>,
	devicetree@...r.kernel.org,
	Mauro Carvalho Chehab <mchehab@....samsung.com>,
	Russell King <linux@....linux.org.uk>,
	linux-arm-kernel@...ts.infradead.org,
	Nathan Lynch <nathan_lynch@...tor.com>,
	Kees Cook <keescook@...omium.org>,
	Paul Bolle <pebolle@...cali.nl>,
	Greg KH <gregkh@...uxfoundation.org>,
	linux-kernel@...r.kernel.org,
	"David S. Miller" <davem@...emloft.net>,
	Uwe Kleine-König 
	<u.kleine-koenig@...gutronix.de>,
	Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH 1/3] ARM: uniphier: add outer cache support

On Mon, 2015-08-24 at 11:18 +0900, Masahiro Yamada wrote:
> This commit adds support for UniPhier outer cache controller.
> All the UniPhier SoCs are equipped with the L2 cache, while the L3
> cache is currently only integrated on PH1-Pro5 SoC.

style trivia:

You might add and use
	#define pr_fmt(fmt) "uniphier: " fmt
before any other #include so all of the pr_<level>
uses are automatically prefixed.

> diff --git a/arch/arm/mm/cache-uniphier.c b/arch/arm/mm/cache-uniphier.c
[]
> +static int __init __uniphier_cache_init(void)
> +{
[]
> +	if (uniphier_outer_levels == 0) {
> +		ret = ret ?: -ENODEV;
> +		pr_err("uniphier: failed to initialize outer cache\n");

So this becomes:
		pr_err("failed to initialize outer cache\n");

> +int __init uniphier_cache_init(void)
> +{
[]
> +	pr_info("uniphier: enabled outer cache (%s)\n",
> +		uniphier_outer_levels >= 2 ? "L2 and L3" : "L2");

	pr_info("enabled outer cache (%s)\n",
		uniphier_outer_levels >= 2 ? "L2 and L3" : "L2");

etc...


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