linux-kernel - Re: [PATCH 5/6] Staging: iio: impedance-analyzer: Prefer using the BIT macro

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Date:	Thu, 10 Sep 2015 15:35:14 +0530 (IST)
From:	Shraddha Barke <shraddha.6596@...il.com>
To:	Julia Lawall <julia.lawall@...6.fr>
cc:	Shraddha Barke <shraddha.6596@...il.com>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Lars-Peter Clausen <lars@...afoo.de>,
	Jonathan Cameron <jic23@...nel.org>,
	Peter Meerwald <pmeerw@...erw.net>,
	Hartmut Knaack <knaack.h@....de>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 5/6] Staging: iio: impedance-analyzer: Prefer using the
 BIT macro



On Thu, 10 Sep 2015, Julia Lawall wrote:

> On Thu, 10 Sep 2015, Shraddha Barke wrote:
>
>> This patch replaces bit shifting on 1 with the BIT(x) macro
>> as it's extensively used by other function in this driver.
>>
>> This was done with coccinelle:
>> @@ int g; @@
>>
>> -(1 << g)
>> +BIT(g)
>
> This doesn't look like a good idea here, since there is a mixture of uses
> of BIT and other things for similar values.
>
Yes I'll send a new patch series dropping the cases of mixed uses of BIT.
I hope Greg will ignore these patches.
I found some instances of this issue in lustre file system.Should I go
ahead with fixing those too?

Thanks,

Shraddha


> julia
>
>> Signed-off-by: Shraddha Barke <shraddha.6596@...il.com>
>> ---
>>  drivers/staging/iio/impedance-analyzer/ad5933.c | 22 +++++++++++-----------
>>  1 file changed, 11 insertions(+), 11 deletions(-)
>>
>> diff --git a/drivers/staging/iio/impedance-analyzer/ad5933.c b/drivers/staging/iio/impedance-analyzer/ad5933.c
>> index c18109c..48acad0 100644
>> --- a/drivers/staging/iio/impedance-analyzer/ad5933.c
>> +++ b/drivers/staging/iio/impedance-analyzer/ad5933.c
>> @@ -39,7 +39,7 @@
>>  #define AD5933_REG_IMAG_DATA		0x96	/* R, 2 bytes*/
>>
>>  /* AD5933_REG_CONTROL_HB Bits */
>> -#define AD5933_CTRL_INIT_START_FREQ	(0x1 << 4)
>> +#define AD5933_CTRL_INIT_START_FREQ	BIT(4)
>>  #define AD5933_CTRL_START_SWEEP		(0x2 << 4)
>>  #define AD5933_CTRL_INC_FREQ		(0x3 << 4)
>>  #define AD5933_CTRL_REPEAT_FREQ		(0x4 << 4)
>> @@ -48,23 +48,23 @@
>>  #define AD5933_CTRL_STANDBY		(0xB << 4)
>>
>>  #define AD5933_CTRL_RANGE_2000mVpp	(0x0 << 1)
>> -#define AD5933_CTRL_RANGE_200mVpp	(0x1 << 1)
>> +#define AD5933_CTRL_RANGE_200mVpp	BIT(1)
>>  #define AD5933_CTRL_RANGE_400mVpp	(0x2 << 1)
>>  #define AD5933_CTRL_RANGE_1000mVpp	(0x3 << 1)
>>  #define AD5933_CTRL_RANGE(x)		((x) << 1)
>>
>> -#define AD5933_CTRL_PGA_GAIN_1		(0x1 << 0)
>> +#define AD5933_CTRL_PGA_GAIN_1		BIT(0)
>>  #define AD5933_CTRL_PGA_GAIN_5		(0x0 << 0)
>>
>>  /* AD5933_REG_CONTROL_LB Bits */
>> -#define AD5933_CTRL_RESET		(0x1 << 4)
>> +#define AD5933_CTRL_RESET		BIT(4)
>>  #define AD5933_CTRL_INT_SYSCLK		(0x0 << 3)
>> -#define AD5933_CTRL_EXT_SYSCLK		(0x1 << 3)
>> +#define AD5933_CTRL_EXT_SYSCLK		BIT(3)
>>
>>  /* AD5933_REG_STATUS Bits */
>> -#define AD5933_STAT_TEMP_VALID		(0x1 << 0)
>> -#define AD5933_STAT_DATA_VALID		(0x1 << 1)
>> -#define AD5933_STAT_SWEEP_DONE		(0x1 << 2)
>> +#define AD5933_STAT_TEMP_VALID		BIT(0)
>> +#define AD5933_STAT_DATA_VALID		BIT(1)
>> +#define AD5933_STAT_SWEEP_DONE		BIT(2)
>>
>>  /* I2C Block Commands */
>>  #define AD5933_I2C_BLOCK_WRITE		0xA0
>> @@ -222,7 +222,7 @@ static int ad5933_set_freq(struct ad5933_state *st,
>>  		u8 d8[4];
>>  	} dat;
>>
>> -	freqreg = (u64) freq * (u64) (1 << 27);
>> +	freqreg = (u64) freq * (u64) BIT(27);
>>  	do_div(freqreg, st->mclk_hz / 4);
>>
>>  	switch (reg) {
>> @@ -308,7 +308,7 @@ static ssize_t ad5933_show_frequency(struct device *dev,
>>  	freqreg = be32_to_cpu(dat.d32) & 0xFFFFFF;
>>
>>  	freqreg = (u64) freqreg * (u64) (st->mclk_hz / 4);
>> -	do_div(freqreg, 1 << 27);
>> +	do_div(freqreg, BIT(27));
>>
>>  	return sprintf(buf, "%d\n", (int) freqreg);
>>  }
>> @@ -437,7 +437,7 @@ static ssize_t ad5933_store(struct device *dev,
>>
>>  		/* 2x, 4x handling, see datasheet */
>>  		if (val > 511)
>> -			val = (val >> 1) | (1 << 9);
>> +			val = (val >> 1) | BIT(9);
>>  		else if (val > 1022)
>>  			val = (val >> 2) | (3 << 9);
>>
>> --
>> 2.1.4
>>
>>
>
--
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