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Date:	Thu, 1 Oct 2015 17:56:19 +0200
From:	Maxime Coquelin <maxime.coquelin@...com>
To:	Giuseppe Cavallaro <peppe.cavallaro@...com>,
	<peter.griffin@...aro.org>, <lee.jones@...aro.org>,
	<alexandre.torgue@...com>, <linux-arm-kernel@...ts.infradead.org>,
	<devicetree@...r.kernel.org>
CC:	<maxime.coquelin@...com>, <kernel@...inux.com>,
	<linux-kernel@...r.kernel.org>
Subject: [PATCH 1/4] ARM: dts: Fix RGMII pinctrl timings

These new re-timing values provides a better stability on Ethernet link.

Signed-off-by: Maxime Coquelin <maxime.coquelin@...com>
---
 arch/arm/boot/dts/stih407-pinctrl.dtsi | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/stih407-pinctrl.dtsi b/arch/arm/boot/dts/stih407-pinctrl.dtsi
index 8fe542a..a538ae5 100644
--- a/arch/arm/boot/dts/stih407-pinctrl.dtsi
+++ b/arch/arm/boot/dts/stih407-pinctrl.dtsi
@@ -216,9 +216,9 @@
 						rxd2 = <&pio1 6 ALT1 IN DE_IO 0 CLK_A>;
 						rxd3 = <&pio1 7 ALT1 IN DE_IO 0 CLK_A>;
 						rxdv = <&pio2 0 ALT1 IN DE_IO 0 CLK_A>;
-						rxclk = <&pio2 2 ALT1 IN NICLK 500 CLK_A>;
+						rxclk = <&pio2 2 ALT1 IN NICLK 0 CLK_A>;
 						clk125 = <&pio3 7 ALT4 IN NICLK 0 CLK_A>;
-						phyclk = <&pio2 3 ALT4 OUT NICLK 1750 CLK_B>;
+						phyclk = <&pio2 3 ALT4 OUT NICLK 1250 CLK_B>;
 					};
 				};
 
-- 
1.9.1

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