lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Fri, 2 Oct 2015 17:05:53 -0600
From:	Khalid Aziz <khalid.aziz@...cle.com>
To:	Yinghai Lu <yinghai@...nel.org>
Cc:	Bjorn Helgaas <bhelgaas@...gle.com>,
	David Miller <davem@...emloft.net>,
	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	Wei Yang <weiyang@...ux.vnet.ibm.com>, TJ <linux@....tj>,
	Yijing Wang <wangyijing@...wei.com>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v6 01/53] sparc/PCI: Add mem64 resource parsing for root
 bus

On 10/02/2015 04:05 PM, Yinghai Lu wrote:
> On Fri, Oct 2, 2015 at 1:00 PM, Khalid Aziz <khalid.aziz@...cle.com> wrote:
>> On Wed, 2015-09-30 at 22:52 -0700, Yinghai Lu wrote:
>>> Found "no compatible bridge window" warning in boot log from T5-8.
>>>
>>> pci 0000:00:01.0: can't claim BAR 15 [mem 0x100000000-0x4afffffff pref]: no compatible bridge window
>>>
>>> That resource is above 4G, but does not get offset correctly as
>>> root bus only report io and mem32.
>>>
>>> pci_sun4v f02dbcfc: PCI host bridge to bus 0000:00
>>> pci_bus 0000:00: root bus resource [io  0x804000000000-0x80400fffffff] (bus address [0x0000-0xfffffff])
>>> pci_bus 0000:00: root bus resource [mem 0x800000000000-0x80007effffff] (bus address [0x00000000-0x7effffff])
>>> pci_bus 0000:00: root bus resource [bus 00-77]
>>>
>>> Add mem64 handling in pci_common for sparc, so we can have 64bit resource
>>> registered for root bus at first.
>>>
>>> After patch, will have:
>>> pci_sun4v f02dbcfc: PCI host bridge to bus 0000:00
>>> pci_bus 0000:00: root bus resource [io  0x804000000000-0x80400fffffff] (bus address [0x0000-0xfffffff])
>>> pci_bus 0000:00: root bus resource [mem 0x800000000000-0x80007effffff] (bus address [0x00000000-0x7effffff])
>>> pci_bus 0000:00: root bus resource [mem 0x800100000000-0x8007ffffffff] (bus address [0x100000000-0x7ffffffff])
>>> pci_bus 0000:00: root bus resource [bus 00-77]
>>>
>>> -v2: mem64_space should use mem_space.start as offset.
>>> -v3: add IORESOURCE_MEM_64 flag
> ...
>> PCI: Scanning PBM /pci@301
>> pci_sun4v f0339c2c: PCI host bridge to bus 0009:00
>> pci_bus 0009:00: root bus resource [io  0x2027e40000000-0x2027e4fffffff] (bus address [0x0000-0xfffffff])
>> pci_bus 0009:00: root bus resource [mem 0x2024000100000-0x202407effffff] (bus address [0x00000000-0x7eefffff])
>> pci_bus 0009:00: root bus resource [mem 0x2024100000000-0x2024dffffffff] (bus address [0xfff00000-0xdffefffff])
>
> Looks like offset for mmio64 is not right.
>
> Please check attached patch on the this platform  and T5-8.

Good catch! That code change looks like the right thing to do and it 
fixed my issues with ixgbe not attaching. I still see lots of "no 
compatible bridge window" messages but overlapping address ranges are no 
longer reserved and as a result drivers are able to ioremap BARs 
successfully.

I have tested it on a T7 and one other platform where I was seeing 
problems without mem64 and both platforms work with this patch. I have 
not been able to get my hands on a T5-8 yet but I will try again on Monday.

Thanks,
Khalid

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ