linux-kernel - [PATCH 2/3] staging: rtl8188eu: bugfix: correct channels range is set in Hal

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Date:	Sat, 10 Oct 2015 13:27:00 +0700
From:	Ivan Safonov <insafonov@...il.com>
To:	linux-kernel@...r.kernel.org
Cc:	devel@...verdev.osuosl.org,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Ivan Safonov <insafonov@...il.com>
Subject: [PATCH 2/3] staging: rtl8188eu: bugfix: correct channels range is
 set in Hal_ReadTxPowerInfo88E

Correct channels range is 1..14 (numbering from 1) but not 0..13.

Signed-off-by: Ivan Safonov <insafonov@...il.com>
---
 drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
index 4fa2c78..46e0fdd 100644
--- a/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
+++ b/drivers/staging/rtl8188eu/hal/rtl8188e_hal_init.c
@@ -481,18 +481,18 @@ void Hal_ReadTxPowerInfo88E(struct adapter *padapter, u8 *PROMContent, bool Auto
 		pHalData->bTXPowerDataReadFromEEPORM = true;
 
 	for (rfPath = 0; rfPath < pHalData->NumTotalRFPath; rfPath++) {
-		for (ch = 0; ch < CHANNEL_MAX_NUMBER; ch++) {
+		for (ch = 1; ch <= CHANNEL_MAX_NUMBER; ch++) {
 			group = get_channel_group(ch);
 
-			pHalData->Index24G_CCK_Base[rfPath][ch] = pwrInfo24G.IndexCCK_Base[rfPath][group];
+			pHalData->Index24G_CCK_Base[rfPath][ch - 1] = pwrInfo24G.IndexCCK_Base[rfPath][group];
 			if (ch == 14)
-				pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][4];
+				pHalData->Index24G_BW40_Base[rfPath][ch - 1] = pwrInfo24G.IndexBW40_Base[rfPath][4];
 			else
-				pHalData->Index24G_BW40_Base[rfPath][ch] = pwrInfo24G.IndexBW40_Base[rfPath][group];
+				pHalData->Index24G_BW40_Base[rfPath][ch - 1] = pwrInfo24G.IndexBW40_Base[rfPath][group];
 
 			DBG_88E("======= Path %d, Channel %d =======\n", rfPath, ch);
-			DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_CCK_Base[rfPath][ch]);
-			DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_BW40_Base[rfPath][ch]);
+			DBG_88E("Index24G_CCK_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_CCK_Base[rfPath][ch - 1]);
+			DBG_88E("Index24G_BW40_Base[%d][%d] = 0x%x\n", rfPath, ch, pHalData->Index24G_BW40_Base[rfPath][ch - 1]);
 		}
 		for (TxCount = 0; TxCount < MAX_TX_COUNT; TxCount++) {
 			pHalData->CCK_24G_Diff[rfPath][TxCount] = pwrInfo24G.CCK_Diff[rfPath][TxCount];
-- 
2.4.9

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