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Date: Thu, 19 Nov 2015 17:38:21 -0800 From: Leonid Yegoshin <Leonid.Yegoshin@...tec.com> To: <linux-mips@...ux-mips.org>, <cernekee@...il.com>, <linux-kernel@...r.kernel.org>, <ralf@...ux-mips.org>, <paul.gortmaker@...driver.com>, <macro@...esourcery.com>, <markos.chandras@...tec.com>, <kumba@...too.org> Subject: [PATCH] MIPS: remove aliasing alignment if HW has antialising support MIPS hardware may have an antialising support and it works even page size is small. Setup a shared memory aliasing mask to page size if hardware has an antialising support. Big shared memory mask forces a disruption in page address assignment and that corrupts Android library memory handling. Signed-off-by: Leonid Yegoshin <Leonid.Yegoshin@...tec.com> --- arch/mips/mm/c-r4k.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 5d3a25e1cfae..493f5226da10 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1670,7 +1670,7 @@ void r4k_cache_init(void) * This code supports virtually indexed processors and will be * unnecessarily inefficient on physically indexed processors. */ - if (c->dcache.linesz) + if (c->dcache.linesz && cpu_has_dc_aliases) shm_align_mask = max_t( unsigned long, c->dcache.sets * c->dcache.linesz - 1, PAGE_SIZE - 1); -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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