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Date: Mon, 4 Jan 2016 13:28:31 +0900
From: Milo Kim <milo.kim@...com>
To: <tglx@...utronix.de>
CC: <jason@...edaemon.net>, <marc.zyngier@....com>,
<alexandre.belloni@...e-electrons.com>,
<boris.brezillon@...e-electrons.com>,
<ludovic.desroches@...el.com>, <nicolas.ferre@...el.com>,
<linux-kernel@...r.kernel.org>, Milo Kim <milo.kim@...com>
Subject: [PATCH 07/19] irqchip: atmel-aic: make common IRQ domain translate function
AIC5 and AIC have common translate interrupt specifiers.
HW IRQ number, interrupt type (flag) and interrupt priority.
For interrupt priority update, those systems look different handing.
AIC5 writes SSR (Source Select Register) first and read SMR (Source Mode
Register) to update interrupt priority.
On the other hand, AIC reads SMR and update the priority into same register.
New helper, 'aic_update_smr()' provides unified handling.
aic_is_ssr_used():
Check whether IRQ chip uses SSR for IRQ selection or not.
AIC5 uses this register. AIC does not have it.
aic_update_smr():
AIC has separate register for mode selection, SMR.
Offset value depends on IRQ source number. (SMR + hwirq * 4)
On the other hands, AIC5 requires two register access, SSR and SMR.
This helper selects the interrupt source on updating prority level or
IRQ flag.
aic_irq_domain_xlate():
Common domain translator handles interrupt specifiers as below.
1. Get HW IRQ number, IRQ flag and priority from interrupt specifiers.
2. If SSR is used, write hwirq into SSR for IRQ selection.
3. Read value of SMR
4. Update priority into SMR
In case of AIC, total number of interrupts is 32. It means selected index
is always zero in xlate(), so generic IRQ chip data can be retrieved from
irq_get_domain_generic_chip(d, 0).
Then, both IRQ domains can use common operations, aic_irq_ops, so ops
argument in aic_common_of_init() can be removed.
Cc: Thomas Gleixner <tglx@...utronix.de>
Cc: Jason Cooper <jason@...edaemon.net>
Cc: Marc Zyngier <marc.zyngier@....com>
Cc: Alexandre Belloni <alexandre.belloni@...e-electrons.com>
Cc: Boris BREZILLON <boris.brezillon@...e-electrons.com>
Cc: Ludovic Desroches <ludovic.desroches@...el.com>
Cc: Nicolas Ferre <nicolas.ferre@...el.com>
Cc: linux-kernel@...r.kernel.org
Signed-off-by: Milo Kim <milo.kim@...com>
---
drivers/irqchip/irq-atmel-aic-common.c | 94 +++++++++++++++++++++-------------
drivers/irqchip/irq-atmel-aic-common.h | 10 ----
drivers/irqchip/irq-atmel-aic.c | 44 +---------------
drivers/irqchip/irq-atmel-aic5.c | 37 +------------
4 files changed, 61 insertions(+), 124 deletions(-)
diff --git a/drivers/irqchip/irq-atmel-aic-common.c b/drivers/irqchip/irq-atmel-aic-common.c
index f840165..94c9dad 100644
--- a/drivers/irqchip/irq-atmel-aic-common.c
+++ b/drivers/irqchip/irq-atmel-aic-common.c
@@ -129,6 +129,63 @@ static const struct aic_reg_offset aic5_regs = {
static const struct aic_reg_offset *aic_reg_data;
+static inline bool aic_is_ssr_used(void)
+{
+ return aic_reg_data->ssr != AT91_INVALID_OFFSET;
+}
+
+static void aic_update_smr(struct irq_chip_generic *gc, int hwirq,
+ u32 mask, u32 val)
+{
+ int reg = aic_reg_data->smr;
+ u32 tmp = 0;
+
+ if (aic_is_ssr_used())
+ irq_reg_writel(gc, hwirq, aic_reg_data->ssr);
+ else
+ reg += hwirq * 4;
+
+ tmp = irq_reg_readl(gc, reg);
+ tmp &= mask;
+ tmp |= val;
+
+ irq_reg_writel(gc, tmp, reg);
+}
+
+static int aic_irq_domain_xlate(struct irq_domain *d, struct device_node *node,
+ const u32 *intspec, unsigned int intsize,
+ irq_hw_number_t *out_hwirq,
+ unsigned int *out_type)
+{
+ struct irq_chip_generic *gc = irq_get_domain_generic_chip(d, 0);
+ bool condition = (intsize < 3) ||
+ (intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY) ||
+ (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY);
+
+ if (!gc || WARN_ON(condition))
+ return -EINVAL;
+
+ /*
+ * intspec[0]: HW IRQ number
+ * intspec[1]: IRQ flag
+ * intspec[2]: IRQ priority
+ */
+
+ *out_hwirq = intspec[0];
+ *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
+
+ irq_gc_lock(gc);
+ aic_update_smr(gc, *out_hwirq, ~AT91_AIC_PRIOR, intspec[2]);
+ irq_gc_unlock(gc);
+
+ return 0;
+}
+
+static const struct irq_domain_ops aic_irq_ops = {
+ .map = irq_map_generic_chip,
+ .xlate = aic_irq_domain_xlate,
+};
+
static void aic_common_shutdown(struct irq_data *d)
{
struct irq_chip_type *ct = irq_data_get_chip_type(d);
@@ -171,38 +228,6 @@ int aic_common_set_type(struct irq_data *d, unsigned type, unsigned *val)
return 0;
}
-int aic_common_set_priority(int priority, unsigned *val)
-{
- if (priority < AT91_AIC_IRQ_MIN_PRIORITY ||
- priority > AT91_AIC_IRQ_MAX_PRIORITY)
- return -EINVAL;
-
- *val &= ~AT91_AIC_PRIOR;
- *val |= priority;
-
- return 0;
-}
-
-int aic_common_irq_domain_xlate(struct irq_domain *d,
- struct device_node *ctrlr,
- const u32 *intspec,
- unsigned int intsize,
- irq_hw_number_t *out_hwirq,
- unsigned int *out_type)
-{
- if (WARN_ON(intsize < 3))
- return -EINVAL;
-
- if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY) ||
- (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY)))
- return -EINVAL;
-
- *out_hwirq = intspec[0];
- *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
-
- return 0;
-}
-
static void __init aic_common_ext_irq_of_init(struct irq_domain *domain)
{
struct device_node *node = irq_domain_get_of_node(domain);
@@ -231,7 +256,6 @@ static void __init aic_common_ext_irq_of_init(struct irq_domain *domain)
}
struct irq_domain *__init aic_common_of_init(struct device_node *node,
- const struct irq_domain_ops *ops,
const char *name, int nirqs)
{
struct irq_chip_generic *gc;
@@ -254,8 +278,8 @@ struct irq_domain *__init aic_common_of_init(struct device_node *node,
goto err_iounmap;
}
- domain = irq_domain_add_linear(node, nchips * AIC_IRQS_PER_CHIP, ops,
- aic);
+ domain = irq_domain_add_linear(node, nchips * AIC_IRQS_PER_CHIP,
+ &aic_irq_ops, aic);
if (!domain) {
ret = -ENOMEM;
goto err_free_aic;
diff --git a/drivers/irqchip/irq-atmel-aic-common.h b/drivers/irqchip/irq-atmel-aic-common.h
index 4c0b471..e068349 100644
--- a/drivers/irqchip/irq-atmel-aic-common.h
+++ b/drivers/irqchip/irq-atmel-aic-common.h
@@ -20,17 +20,7 @@
int aic_common_set_type(struct irq_data *d, unsigned type, unsigned *val);
-int aic_common_set_priority(int priority, unsigned *val);
-
-int aic_common_irq_domain_xlate(struct irq_domain *d,
- struct device_node *ctrlr,
- const u32 *intspec,
- unsigned int intsize,
- irq_hw_number_t *out_hwirq,
- unsigned int *out_type);
-
struct irq_domain *__init aic_common_of_init(struct device_node *node,
- const struct irq_domain_ops *ops,
const char *name, int nirqs);
#endif /* __IRQ_ATMEL_AIC_COMMON_H */
diff --git a/drivers/irqchip/irq-atmel-aic.c b/drivers/irqchip/irq-atmel-aic.c
index f2c0fd9..46ce3ca 100644
--- a/drivers/irqchip/irq-atmel-aic.c
+++ b/drivers/irqchip/irq-atmel-aic.c
@@ -168,47 +168,6 @@ static void __init aic_hw_init(struct irq_domain *domain)
irq_reg_writel(gc, i, AT91_AIC_SVR(i));
}
-static int aic_irq_domain_xlate(struct irq_domain *d,
- struct device_node *ctrlr,
- const u32 *intspec, unsigned int intsize,
- irq_hw_number_t *out_hwirq,
- unsigned int *out_type)
-{
- struct irq_domain_chip_generic *dgc = d->gc;
- struct irq_chip_generic *gc;
- unsigned smr;
- int idx;
- int ret;
-
- if (!dgc)
- return -EINVAL;
-
- ret = aic_common_irq_domain_xlate(d, ctrlr, intspec, intsize,
- out_hwirq, out_type);
- if (ret)
- return ret;
-
- idx = intspec[0] / AIC_IRQS_PER_CHIP;
- if (idx >= dgc->num_chips)
- return -EINVAL;
-
- gc = dgc->gc[idx];
-
- irq_gc_lock(gc);
- smr = irq_reg_readl(gc, AT91_AIC_SMR(*out_hwirq));
- ret = aic_common_set_priority(intspec[2], &smr);
- if (!ret)
- irq_reg_writel(gc, smr, AT91_AIC_SMR(*out_hwirq));
- irq_gc_unlock(gc);
-
- return ret;
-}
-
-static const struct irq_domain_ops aic_irq_ops = {
- .map = irq_map_generic_chip,
- .xlate = aic_irq_domain_xlate,
-};
-
static int __init aic_of_init(struct device_node *node,
struct device_node *parent)
{
@@ -218,8 +177,7 @@ static int __init aic_of_init(struct device_node *node,
if (aic_domain)
return -EEXIST;
- domain = aic_common_of_init(node, &aic_irq_ops, "atmel-aic",
- NR_AIC_IRQS);
+ domain = aic_common_of_init(node, "atmel-aic", NR_AIC_IRQS);
if (IS_ERR(domain))
return PTR_ERR(domain);
diff --git a/drivers/irqchip/irq-atmel-aic5.c b/drivers/irqchip/irq-atmel-aic5.c
index 50d540b..ecaa7e0 100644
--- a/drivers/irqchip/irq-atmel-aic5.c
+++ b/drivers/irqchip/irq-atmel-aic5.c
@@ -248,40 +248,6 @@ static void __init aic5_hw_init(struct irq_domain *domain)
}
}
-static int aic5_irq_domain_xlate(struct irq_domain *d,
- struct device_node *ctrlr,
- const u32 *intspec, unsigned int intsize,
- irq_hw_number_t *out_hwirq,
- unsigned int *out_type)
-{
- struct irq_chip_generic *bgc = irq_get_domain_generic_chip(d, 0);
- unsigned smr;
- int ret;
-
- if (!bgc)
- return -EINVAL;
-
- ret = aic_common_irq_domain_xlate(d, ctrlr, intspec, intsize,
- out_hwirq, out_type);
- if (ret)
- return ret;
-
- irq_gc_lock(bgc);
- irq_reg_writel(bgc, *out_hwirq, AT91_AIC5_SSR);
- smr = irq_reg_readl(bgc, AT91_AIC5_SMR);
- ret = aic_common_set_priority(intspec[2], &smr);
- if (!ret)
- irq_reg_writel(bgc, intspec[2] | smr, AT91_AIC5_SMR);
- irq_gc_unlock(bgc);
-
- return ret;
-}
-
-static const struct irq_domain_ops aic5_irq_ops = {
- .map = irq_map_generic_chip,
- .xlate = aic5_irq_domain_xlate,
-};
-
static int __init aic5_of_init(struct device_node *node,
struct device_node *parent,
int nirqs)
@@ -297,8 +263,7 @@ static int __init aic5_of_init(struct device_node *node,
if (aic5_domain)
return -EEXIST;
- domain = aic_common_of_init(node, &aic5_irq_ops, "atmel-aic5",
- nirqs);
+ domain = aic_common_of_init(node, "atmel-aic5", nirqs);
if (IS_ERR(domain))
return PTR_ERR(domain);
--
2.6.4
--
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