linux-kernel - Re: [PATCH v3] arm: irq: l2c: do not print error in case of missing l2c from dtb

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Date:	Wed, 20 Jan 2016 15:02:49 -0300
From:	Javier Martinez Canillas <javier@...hile0.org>
To:	Andi Shyti <andi.shyti@...sung.com>
Cc:	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Krzysztof Kozłowski <k.kozlowski@...sung.com>,
	Russell King <linux@....linux.org.uk>,
	Tony Lindgren <tony@...mide.com>,
	Tomasz Figa <tomasz.figa@...il.com>,
	Linux Kernel <linux-kernel@...r.kernel.org>,
	yamada.masahiro@...ionext.com, andi@...zian.org,
	Olof Johansson <olof@...om.net>,
	Thomas Gleixner <tglx@...utronix.de>,
	Jiang Liu <jiang.liu@...ux.intel.com>,
	Marek Szyprowski <m.szyprowski@...sung.com>
Subject: Re: [PATCH v3] arm: irq: l2c: do not print error in case of missing
 l2c from dtb

Hello Andi,

On Tue, Jan 12, 2016 at 7:11 AM, Andi Shyti <andi.shyti@...sung.com> wrote:
> In some architectures the L2 cache controller is integrated in the
> processor's block itself and it doesn't use any external cache
> controller. This means that an entry in the board's dtb related
> to the l2c is not necessary.
>
> Distinguish between error codes and do not print anything in case
> l2x0_of_init() doesn't find any L2C DTB entry and returns -ENODEV.
>
> This patch mutes the following error message:
>
>    L2C: failed to init: -19
>
> on boards like odroid-xu4, cortex A7/A15, which don't have
> external cache controller.
>

The patch also looks good to me and makes the error message to go away
in my Exynos5800 Peach Pi.

Reviewed-by: Javier Martinez Canillas <javier@....samsung.com>
Tested-by: Javier Martinez Canillas <javier@....samsung.com>

Best regards,
Javier