lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Thu, 28 Jan 2016 18:23:24 +0800
From:	Hanjun Guo <hanjun.guo@...aro.org>
To:	Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
	Tomasz Nowicki <tn@...ihalf.com>, jiang.liu@...ux.intel.com
Cc:	bhelgaas@...gle.com, arnd@...db.de, will.deacon@....com,
	catalin.marinas@....com, rjw@...ysocki.net, okaya@...eaurora.org,
	Stefano.Stabellini@...citrix.com,
	robert.richter@...iumnetworks.com, mw@...ihalf.com,
	Liviu.Dudau@....com, ddaney@...iumnetworks.com, tglx@...utronix.de,
	wangyijing@...wei.com, Suravee.Suthikulpanit@....com,
	msalter@...hat.com, linux-pci@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-acpi@...r.kernel.org,
	linux-kernel@...r.kernel.org, linaro-acpi@...ts.linaro.org,
	jchandra@...adcom.com, jcm@...hat.com
Subject: Re: [PATCH V3 18/21] ACPI, PCI: Refine the way to handle
 translation_offset for ACPI resources

Hi Lorenzo,

On 2016/1/19 20:20, Lorenzo Pieralisi wrote:
> Gerry,
>
> On Wed, Jan 13, 2016 at 02:21:04PM +0100, Tomasz Nowicki wrote:
>> From: Liu Jiang <jiang.liu@...ux.intel.com>
>>
>> Some architectures, such as IA64 and ARM64, have no instructions to
>> directly access PCI IO ports, so they map PCI IO ports into PCI MMIO
>> address space. Typically PCI host bridges on those architectures take
>> the responsibility to map (translate) PCI IO port transactions into
>> Memory-Mapped IO transactions. ACPI specification provides support
>> of such a usage case by using resource translation_offset.
>>
>> But current ACPI resource parsing interface isn't neutral enough,
>> it still has some special logic for IA64. So refine the ACPI resource
>> parsing interface and IA64 code to neutrally handle translation_offset
>> by:
>> 1) ACPI resource parsing interface doesn't do any translation, it just
>>     save the translation_offset to be used by arch code.
>> 2) Arch code will do the mapping(translation) based on arch specific
>>     information. Typically it does:
>> 2.a) Translate per PCI domain IO port address space into system global
>>     IO port address space.
>> 2.b) Setup MMIO address mapping for IO ports.
>
> This patch fixes IO space handling on IA64 and should go in as a fix.
>
> IA64 PCI IO space is currently broken (Hanjun tested this on an IA64 box).
>
> The first broken commit is:
>
> 3772aea7d6f3 ("ia64/PCI/ACPI: Use common ACPI resource parsing interface for host bridge")
>
> because acpi core code checks (in acpi_dev_ioresource_flags()) the
> resource.end>=0x10003, which fails on ia64 - currently resource.end is
> set in acpi_decode_space() to:
>
> AddressMaximum + AddressTranslation
>
> where AddressTranslation is the CPU physical address mapping IO space
> on IA64, the >=0x10003 check in acpi_dev_ioresource_flags always
> triggers and the IO resource is then disabled.
>
> Do you want me to re-send this patch as a fix, with updated commit log ?

I talked to Gerry offline, he is busy these days, he said it's pretty
OK for you to resend this patch and fix the problem.

Thanks
Hanjun

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ