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Date: Mon, 1 Feb 2016 17:02:56 -0700
From: Joshua Henderson <joshua.henderson@...rochip.com>
To: <linux-kernel@...r.kernel.org>
CC: <linux-mips@...ux-mips.org>, <ralf@...ux-mips.org>,
Joshua Henderson <joshua.henderson@...rochip.com>,
Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
Kumar Gala <galak@...eaurora.org>, <devicetree@...r.kernel.org>
Subject: [PATCH 1/2] dt/bindings: Add bindings for PIC32 watchdog peripheral
Document the devicetree bindings for the watchdog peripheral found on Microchip
PIC32 SoC class devices.
Signed-off-by: Joshua Henderson <joshua.henderson@...rochip.com>
Cc: Ralf Baechle <ralf@...ux-mips.org>
Cc: <linux-mips@...ux-mips.org>
---
Note: Please merge this patch series through the MIPS tree.
---
.../bindings/watchdog/microchip,pic32-wdt.txt | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
create mode 100644 Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt
diff --git a/Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt b/Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt
new file mode 100644
index 0000000..3ce2839
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/microchip,pic32-wdt.txt
@@ -0,0 +1,18 @@
+* Microchip PIC32 Watchdog Timer
+
+When enabled, the watchdog peripheral can be used to reset the device if the
+WDT is not cleared periodically in software.
+
+Required properties:
+- compatible: must be "microchip,pic32mzda-wdt".
+- reg: physical base address of the controller and length of memory mapped
+ region.
+- clocks: phandle of source clk. should be <&LPRC> clk.
+
+Example:
+
+ watchdog0: wdt@...00800 {
+ compatible = "microchip,pic32mzda-wdt";
+ reg = <0x1f800800 0x200>;
+ clocks = <&LPRC>;
+ };
--
1.7.9.5
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