lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Thu, 11 Feb 2016 16:31:11 -0800
From:	Stephen Boyd <sboyd@...eaurora.org>
To:	Rajendra Nayak <rnayak@...eaurora.org>
Cc:	mturquette@...libre.com, linux-kernel@...r.kernel.org,
	linux-clk@...r.kernel.org, linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v2 2/6] clk: qcom: gdsc: Add support for gdscs with gds
 hw controller

On 12/01, Rajendra Nayak wrote:
> Some gdsc power domains can have a gds_hw_controller block inside
> to help ensure all slave devices within the power domain are idle
> before the gdsc is actually switched off.
> This is mainly useful in power domains which host a MMU, in which
> case its necessary to make sure there are no outstanding MMU operations
> or pending bus transactions before the power domain is turned off.
> 
> In gdscs with gds_hw_controller block, its necessary to check the
> gds_hw_ctrl status bits instead of the ones in gdscr, to determine
> the state of the powerdomain.
> 
> While at it, also move away from using jiffies and use ktime APIs
> instead for busy looping on status bits.
> 
> Signed-off-by: Rajendra Nayak <rnayak@...eaurora.org>
> ---

Applied to clk-next

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ