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Date:	Sat, 20 Feb 2016 23:34:41 +0100
From:	Arnd Bergmann <arnd@...db.de>
To:	Anurag Kumar Vulisha <anurag.kumar.vulisha@...inx.com>
Cc:	robh+dt@...nel.org, pawel.moll@....com, mark.rutland@....com,
	ijc+devicetree@...lion.org.uk, galak@...eaurora.org, tj@...nel.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-ide@...r.kernel.org, anirudh@...inx.com, svemula@...inx.com,
	punnaia@...inx.com, Anurag Kumar Vulisha <anuragku@...inx.com>
Subject: Re: [RFC PATCH] drivers: ata: Read Rx water mark value from device-tree

On Saturday 20 February 2016 18:48:22 Anurag Kumar Vulisha wrote:
> index 7ca8b97..7e48dfc 100644
> --- a/Documentation/devicetree/bindings/ata/ahci-ceva.txt
> +++ b/Documentation/devicetree/bindings/ata/ahci-ceva.txt
> @@ -8,6 +8,7 @@ Required properties:
>  
>  Optional properties:
>    - ceva,broken-gen2: limit to gen1 speed instead of gen2.
> +  - ceva,rx-watermark: RX fifo water mark level for SATA controller.
>  
>  Examples:
>         ahci@...c0000 {
> @@ -17,4 +18,5 @@ Examples:
>                 interrupts = <0 133 4>;
>                 clocks = <&clkc SATA_CLK_ID>;
>                 ceva,broken-gen2;
> +               ceva,rx-watermark = <0x40>;
>         };
> 

How would a hardware integrator know which value is right for a
particular SoC?

Could it be keyed off the hardware ID? Could the bootloader
perhaps set an appropriate value in the AHCI_VEND_PTC
register at boot time and the driver read the initial
value from it?

>From the description, it sounds like this is a policy decision
rather than hardware description, and shouldn't really be
in here.

	Arnd

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