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Date: Mon, 29 Feb 2016 22:55:30 +0800
From: kbuild test robot <lkp@...el.com>
To: Jan Glauber <jglauber@...ium.com>
Cc: kbuild-all@...org, Wolfram Sang <wsa@...-dreams.de>,
linux-kernel@...r.kernel.org, linux-i2c@...r.kernel.org,
ddaney@...iumnetworks.com, Jan Glauber <jglauber@...ium.com>
Subject: Re: [Resend PATCH 09/10] i2c: split i2c-octeon driver and add
ThunderX support
Hi Jan,
[auto build test ERROR on wsa/i2c/for-next]
[also build test ERROR on v4.5-rc6 next-20160229]
[if your patch is applied to the wrong git tree, please drop us a note to help improving the system]
url: https://github.com/0day-ci/linux/commits/Jan-Glauber/i2c-octeon-and-i2c-thunderx-drivers/20160229-215100
base: https://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux i2c/for-next
config: x86_64-allmodconfig (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
All errors (new ones prefixed by >>):
In file included from arch/x86/include/asm/realmode.h:5:0,
from arch/x86/include/asm/acpi.h:33,
from arch/x86/include/asm/fixmap.h:19,
from arch/x86/include/asm/apic.h:12,
from arch/x86/include/asm/smp.h:12,
from arch/x86/include/asm/mmzone_64.h:10,
from arch/x86/include/asm/mmzone.h:4,
from include/linux/mmzone.h:855,
from include/linux/gfp.h:5,
from include/linux/device.h:29,
from include/linux/i2c.h:30,
from drivers/i2c/busses/i2c-thunderx-core.c:11:
drivers/i2c/busses/i2c-thunderx-core.c: In function 'thunder_i2c_int_enable':
>> drivers/i2c/busses/i2c-thunderx-core.c:34:46: error: 'TWSI_INT_ENA_W1S' undeclared (first use in this function)
__raw_writeq(INT_ENA_CORE, i2c->twsi_base + TWSI_INT_ENA_W1S);
^
arch/x86/include/asm/io.h:97:45: note: in definition of macro '__raw_writeq'
#define __raw_writeq(val, addr) writeq(val, addr)
^
drivers/i2c/busses/i2c-thunderx-core.c:34:46: note: each undeclared identifier is reported only once for each function it appears in
__raw_writeq(INT_ENA_CORE, i2c->twsi_base + TWSI_INT_ENA_W1S);
^
arch/x86/include/asm/io.h:97:45: note: in definition of macro '__raw_writeq'
#define __raw_writeq(val, addr) writeq(val, addr)
^
drivers/i2c/busses/i2c-thunderx-core.c: In function 'thunder_i2c_int_disable':
>> drivers/i2c/busses/i2c-thunderx-core.c:43:46: error: 'TWSI_INT_ENA_W1C' undeclared (first use in this function)
__raw_writeq(INT_ENA_CORE, i2c->twsi_base + TWSI_INT_ENA_W1C);
^
arch/x86/include/asm/io.h:97:45: note: in definition of macro '__raw_writeq'
#define __raw_writeq(val, addr) writeq(val, addr)
^
drivers/i2c/busses/i2c-thunderx-core.c: In function 'thunder_i2c_hlc_int_enable':
drivers/i2c/busses/i2c-thunderx-core.c:50:25: error: 'TWSI_INT_ENA_W1S' undeclared (first use in this function)
i2c->twsi_base + TWSI_INT_ENA_W1S);
^
arch/x86/include/asm/io.h:97:45: note: in definition of macro '__raw_writeq'
#define __raw_writeq(val, addr) writeq(val, addr)
^
drivers/i2c/busses/i2c-thunderx-core.c: In function 'thunder_i2c_hlc_int_disable':
drivers/i2c/busses/i2c-thunderx-core.c:57:25: error: 'TWSI_INT_ENA_W1C' undeclared (first use in this function)
i2c->twsi_base + TWSI_INT_ENA_W1C);
^
arch/x86/include/asm/io.h:97:45: note: in definition of macro '__raw_writeq'
#define __raw_writeq(val, addr) writeq(val, addr)
^
drivers/i2c/busses/i2c-thunderx-core.c: In function 'thunder_i2c_probe_pci':
>> drivers/i2c/busses/i2c-thunderx-core.c:174:34: error: 'struct octeon_i2c' has no member named 'i2c_msix'
ret = pci_enable_msix(pdev, &i2c->i2c_msix, 1);
^
drivers/i2c/busses/i2c-thunderx-core.c:180:33: error: 'struct octeon_i2c' has no member named 'i2c_msix'
ret = devm_request_irq(dev, i2c->i2c_msix.vector, octeon_i2c_isr, 0,
^
drivers/i2c/busses/i2c-thunderx-core.c:209:24: error: 'struct octeon_i2c' has no member named 'i2c_msix'
devm_free_irq(dev, i2c->i2c_msix.vector, i2c);
^
drivers/i2c/busses/i2c-thunderx-core.c: In function 'thunder_i2c_remove_pci':
drivers/i2c/busses/i2c-thunderx-core.c:236:24: error: 'struct octeon_i2c' has no member named 'i2c_msix'
devm_free_irq(dev, i2c->i2c_msix.vector, i2c);
^
vim +/TWSI_INT_ENA_W1S +34 drivers/i2c/busses/i2c-thunderx-core.c
5 * Authors: Fred Martin <fmartin@...iumnetworks.com>
6 * Jan Glauber <jglauber@...ium.com>
7 */
8
9 #include <linux/clk.h>
10 #include <linux/delay.h>
> 11 #include <linux/i2c.h>
12 #include <linux/interrupt.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/pci.h>
16
17 #include "i2c-cavium.h"
18
19 #define DRV_NAME "i2c-thunderx"
20
21 #define PCI_CFG_REG_BAR_NUM 0
22 #define PCI_DEVICE_ID_THUNDER_TWSI 0xa012
23
24 #define TWSI_DFL_RATE 100000
25 #define SYS_FREQ_DEFAULT 800000000
26
27 /*
28 * Enable the CORE interrupt.
29 * The interrupt will be asserted when there is non-STAT_IDLE state in the
30 * SW_TWSI_EOP_TWSI_STAT register.
31 */
32 static void thunder_i2c_int_enable(struct octeon_i2c *i2c)
33 {
> 34 __raw_writeq(INT_ENA_CORE, i2c->twsi_base + TWSI_INT_ENA_W1S);
35 __raw_readq(i2c->twsi_base + TWSI_INT_ENA_W1S);
36 }
37
38 /*
39 * Disable the CORE interrupt.
40 */
41 static void thunder_i2c_int_disable(struct octeon_i2c *i2c)
42 {
> 43 __raw_writeq(INT_ENA_CORE, i2c->twsi_base + TWSI_INT_ENA_W1C);
44 __raw_readq(i2c->twsi_base + TWSI_INT_ENA_W1C);
45 }
46
47 static void thunder_i2c_hlc_int_enable(struct octeon_i2c *i2c)
48 {
49 __raw_writeq(INT_ENA_ST | INT_ENA_TS,
50 i2c->twsi_base + TWSI_INT_ENA_W1S);
51 __raw_readq(i2c->twsi_base + TWSI_INT_ENA_W1S);
52 }
53
54 static void thunder_i2c_hlc_int_disable(struct octeon_i2c *i2c)
55 {
56 __raw_writeq(INT_ENA_ST | INT_ENA_TS,
> 57 i2c->twsi_base + TWSI_INT_ENA_W1C);
58 __raw_readq(i2c->twsi_base + TWSI_INT_ENA_W1C);
59 }
60
61 static u32 thunderx_i2c_functionality(struct i2c_adapter *adap)
62 {
63 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
64 }
65
66 static const struct i2c_algorithm thunderx_i2c_algo = {
67 .master_xfer = octeon_i2c_xfer,
68 .functionality = thunderx_i2c_functionality,
69 };
70
71 static struct i2c_adapter thunderx_i2c_ops = {
72 .owner = THIS_MODULE,
73 .name = "ThunderX adapter",
74 .algo = &thunderx_i2c_algo,
75 };
76
77 static void thunder_i2c_clock_enable(struct device *dev, struct octeon_i2c *i2c)
78 {
79 int ret;
80
81 i2c->clk = devm_clk_get(dev, NULL);
82 if (IS_ERR(i2c->clk)) {
83 i2c->clk = NULL;
84 goto skip;
85 }
86
87 ret = clk_prepare_enable(i2c->clk);
88 if (ret)
89 goto skip;
90 i2c->sys_freq = clk_get_rate(i2c->clk);
91
92 skip:
93 if (!i2c->sys_freq)
94 i2c->sys_freq = SYS_FREQ_DEFAULT;
95
96 dev_info(dev, "Set system clock to %u\n", i2c->sys_freq);
97 }
98
99 static void thunder_i2c_clock_disable(struct device *dev, struct clk *clk)
100 {
101 if (!clk)
102 return;
103 clk_disable_unprepare(clk);
104 devm_clk_put(dev, clk);
105 }
106
107 static void thunder_i2c_set_name(struct pci_dev *pdev, struct octeon_i2c *i2c,
108 char *name)
109 {
110 u8 i2c_bus_id, soc_node;
111 resource_size_t start;
112
113 start = pci_resource_start(pdev, PCI_CFG_REG_BAR_NUM);
114 soc_node = (start >> 44) & 0x3;
115 i2c_bus_id = (start >> 24) & 0x7;
116 snprintf(name, 10, "i2c%d", soc_node * 6 + i2c_bus_id);
117
118 snprintf(i2c->adap.name, sizeof(i2c->adap.name), "thunderx-i2c-%d.%d",
119 soc_node, i2c_bus_id);
120 }
121
122 static int thunder_i2c_probe_pci(struct pci_dev *pdev,
123 const struct pci_device_id *ent)
124 {
125 struct device *dev = &pdev->dev;
126 struct device_node *node = NULL;
127 struct octeon_i2c *i2c;
128 char i2c_name[10];
129 int ret = 0;
130
131 i2c = devm_kzalloc(dev, sizeof(*i2c), GFP_KERNEL);
132 if (!i2c)
133 return -ENOMEM;
134
135 i2c->dev = dev;
136 pci_set_drvdata(pdev, i2c);
137 ret = pci_enable_device(pdev);
138 if (ret) {
139 dev_err(dev, "Failed to enable PCI device\n");
140 goto out_free_i2c;
141 }
142
143 ret = pci_request_regions(pdev, DRV_NAME);
144 if (ret) {
145 dev_err(dev, "PCI request regions failed 0x%x\n", ret);
146 goto out_disable_device;
147 }
148
149 i2c->twsi_base = pci_ioremap_bar(pdev, PCI_CFG_REG_BAR_NUM);
150 if (!i2c->twsi_base) {
151 dev_err(dev, "Cannot map CSR memory space\n");
152 ret = -EINVAL;
153 goto out_release_regions;
154 }
155
156 thunder_i2c_clock_enable(dev, i2c);
157
158 thunder_i2c_set_name(pdev, i2c, i2c_name);
159 node = of_find_node_by_name(NULL, i2c_name);
160 if (!node || of_property_read_u32(node, "clock-frequency",
161 &i2c->twsi_freq))
162 i2c->twsi_freq = TWSI_DFL_RATE;
163
164 init_waitqueue_head(&i2c->queue);
165
166 ret = octeon_i2c_initlowlevel(i2c);
167 if (ret) {
168 dev_err(dev, "Init low level failed\n");
169 goto out_unmap;
170 }
171
172 octeon_i2c_setclock(i2c);
173
> 174 ret = pci_enable_msix(pdev, &i2c->i2c_msix, 1);
175 if (ret) {
176 dev_err(dev, "Unable to enable MSI-X\n");
177 goto out_unmap;
---
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