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Date:	Thu, 3 Mar 2016 15:38:28 +0000 (UTC)
From:	Paul Walmsley <paul@...an.com>
To:	Peter Ujfalusi <peter.ujfalusi@...com>
cc:	Tony Lindgren <tony@...mide.com>, robh+dt@...nel.org,
	Tero Kristo <t-kristo@...com>, linux-omap@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 10/11] ARM: DRA7: hwmod: Add data for
 McASP1/2/4/5/6/7/8

Hi Péter,

On Thu, 3 Mar 2016, Peter Ujfalusi wrote:

> On 03/01/2016 07:01 PM, Paul Walmsley wrote:
> >>> 3. Can McASP1,2,3 bus-master onto the L3?  If so, then there should be 
> >>> "dra7xx_mcasp1__l3_main_1"-style links to indicate this.
> >>
> >> I need to check this, but I don't think McASP1,2,3 can be bus-master onto L3.
> > 
> > OK.  When you get back, maybe doublecheck this - it looks to me from 
> > SPRUHZ6 that McASP1-3 have built-in DMA controllers.
> 
> They are only targets on L3. Not sure about the built-in DMA controller

OK thanks.  I took a closer look at SPRUHZ6E and I think I was mistaken 
about those blocks having DMA controllers.  So you can ignore this part
of my comments :-)

- Paul

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