lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Date:	Thu, 17 Mar 2016 13:14:12 -0300
From:	Henrique de Moraes Holschuh <hmh@....eng.br>
To:	Eddie Huang <eddie.huang@...iatek.com>
Cc:	Srinivas Kandagatla <srinivas.kandagatla@...aro.org>,
	Maxime Ripard <maxime.ripard@...e-electrons.com>,
	linux-mediatek@...ts.infradead.org, andrew-ct.chen@...iatek.com,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: NVMEM usage question

On Mon, 14 Mar 2016, Eddie Huang wrote:
> 
> Mediatek PMIC chip have some spare registers used to store information.
> The value of these registers will exist until user unplug battery or
> battery depletion. One of our usage example is store battery utilization

i.e. like battery-backed raid caches.

> in these spare registers. We want to implement NVMEM driver to
> read/write sparse registers, but binding document describe NVMEM is for
> "Non-volatile memory", and for hardware like eeprom, efuse. Since the

Users will expect nvmem to not go away on battery drain, so I don't think it
would be the best fit, semantically speaking.

Unless this is common enough that it would make sense to have a generic
quasi-non-volatile profile for nvmem, and publish that constraint to
userspace in a standard way...

-- 
  "One disk to rule them all, One disk to find them. One disk to bring
  them all and in the darkness grind them. In the Land of Redmond
  where the shadows lie." -- The Silicon Valley Tarot
  Henrique Holschuh

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ