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Date:	Wed, 30 Mar 2016 14:38:08 +0000
From:	Marcel Ziswiler <marcel.ziswiler@...adex.com>
To:	"ynezz@...e.cz" <ynezz@...e.cz>,
	"khalasa@...p.pl" <khalasa@...p.pl>
CC:	"l.stach@...gutronix.de" <l.stach@...gutronix.de>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	"linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>,
	"stefan@...er.ch" <stefan@...er.ch>,
	"bhelgaas@...gle.com" <bhelgaas@...gle.com>,
	"Richard.Zhu@...escale.com" <Richard.Zhu@...escale.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] i.MX6 PCIe: Fix imx6_pcie_deassert_core_reset() polarity

Hi Petr

On Wed, 2016-03-30 at 14:06 +0200, Petr Štetiar wrote:
> Krzysztof Hałasa <khalasa@...p.pl> [2016-03-25 14:32:35]:
> 
> Cześć,
> 
> > 
> > I wonder if all boards (except maybe that Toradex set) use an
> > active-low
> > PCIe reset and are now broken. Perhaps Toradex uses active-high and
> > thus
> > works.
> I'm really puzzled by this :-) With your patch applied I get
> following on
> Toradex Apalis modules:
> 
>  DTS:         reset-gpio = <&gpio1 28 GPIO_ACTIVE_LOW>;
>  dmesg:       imx6q-pcie 1ffc000.pcie: phy link never came up
>  gpio:        gpio-28  (                    |reset               )
> out hi
>  pin voltage: 0V
> 
>  DTS:         reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>;
>  dmesg:       ath9k 0000:01:00.0: enabling device (0140 -> 0142)
>  gpio:        gpio-28  (                    |reset               )
> out lo
>  pin voltage: 3V3
> 
> So Toradex Apalis is actually active-high?

Yes, I actually explained this in detail in my cover letter:

http://article.gmane.org/gmane.linux.drivers.devicetree/154829

>  Thanks.
> 
> -- ynezz


Cheers

Marcel

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