linux-kernel - Re: [PATCH v3 2/2] mmc: dw_mmc: add resets support to dw

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Date:	Fri, 01 Apr 2016 20:42 +0200
From:	Heiko Stuebner <heiko@...ech.de>
To:	Jaehoon Chung <jh80.chung@...sung.com>
Cc:	Guodong Xu <guodong.xu@...aro.org>, shawn.lin@...k-chips.com,
	"robh+dt@...nel.org" <robh+dt@...nel.org>, pawel.moll@....com,
	mark.rutland@....com, ijc+devicetree@...lion.org.uk,
	galak@...eaurora.org, ulf.hansson@...aro.org,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	Xinwei Kong <kong.kongxinwei@...ilicon.com>,
	Zhangfei Gao <zhangfei.gao@...aro.org>,
	"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>
Subject: Re: [PATCH v3 2/2] mmc: dw_mmc: add resets support to dw_mmc

Am Mittwoch, 30. März 2016, 20:40:31 schrieb Jaehoon Chung:
> modified Rob's mail address.
> 
> On 03/30/2016 04:24 PM, Guodong Xu wrote:
> > mmc registers may in abnormal state if mmc is used in bootloader,
> > eg. to support booting from eMMC. So we need reset mmc registers
> > when kernel boots up, instead of assuming mmc is in clean state.
> 
> Do you mean mmc(card side) register or dwmmc host controller's register on
> host side?
> 
> According to dwmmc controller TMR, there are two reset signals. One is
> reset_n, other is rst_n. It seems this patch is relevant to reset_n(For
> host). (rst_n is hardware reset for card.)
> 
> So could you clarify better? Then it's helpful to me for understanding..

I think that actually means a reset of controller IP block logic, outside 
the control of the dw_mmc block itself.

On Rockchip SoCs this gets triggered from the CRU (clock and reset unit), so 
I guess if I'm reading the manual correctly, should be the reset_n signal of 
the ip block.

rst_n on the other hand gets triggered through a dw_mmc register setting and 
is already handled by the dw_mmc driver.


Heiko