linux-kernel - Re: [PATCH v4 3/6] pinctrl: baytrail: Update gpio chip operations

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Mon, 4 Apr 2016 16:08:47 +0200
From:	Linus Walleij <linus.walleij@...aro.org>
To:	Cristina Ciocan <cristina.ciocan@...el.com>
Cc:	Mathias Nyman <mathias.nyman@...ux.intel.com>,
	Mika Westerberg <mika.westerberg@...ux.intel.com>,
	Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Irina Tirdea <irina.tirdea@...el.com>,
	Octavian Purdila <octavian.purdila@...el.com>
Subject: Re: [PATCH v4 3/6] pinctrl: baytrail: Update gpio chip operations

On Fri, Apr 1, 2016 at 1:00 PM, Cristina Ciocan
<cristina.ciocan@...el.com> wrote:

> This patch updates the gpio chip implementation in order to interact with
> the pin control model: the chip contains reference to SOC data and
> pin/group/community information is retrieved through the SOC reference.
>
> Signed-off-by: Cristina Ciocan <cristina.ciocan@...el.com>

Patch applied with Mika's ACK.

Cristina & Mika, can you provide feedback on a patch I sent last week:
http://marc.info/?l=linux-gpio&m=145864063724362&w=2

This makes it possible for a GPIO driver to use native
open drain if the hardware supports this instead of relying
on switching the pin to input and thus expecting high impedance.

With a backing pin control driver I think that maybe we need
a pin control back-end performing things like this on behalf
of the GPIO driver, something like
pinctrl_gpio_set_config(unsigned gpio, enum pin_config_param param,
u16 argument);

So the pin controller can perform config on behalf of the
GPIO driver (e.g. setting a backing pin to open drain).

Do you think we will need this?

Yours,
Linus Walleij