lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [day] [month] [year] [list]
Message-Id: <1462211050-30264-1-git-send-email-moritz.fischer@ettus.com>
Date:	Mon,  2 May 2016 10:44:10 -0700
From:	Moritz Fischer <moritz.fischer@...us.com>
To:	dwmw2@...radead.org
Cc:	computersforpeace@...il.com, ezequiel@...guardiasur.com.ar,
	zajec5@...il.com, boris.brezillon@...e-electrons.com,
	jteki@...nedev.com, furquan@...gle.com, cyrille.pitchen@...el.com,
	moritz.fischer.private@...il.com, linux-mtd@...ts.infradead.org,
	linux-kernel@...r.kernel.org,
	Moritz Fischer <moritz.fischer@...us.com>
Subject: [PATCH] mtd: spi-nor: Add support for Micron n25q016a

This commit adds support in the spi-nor driver for the
N25Q016A, a 16Mbit SPI NOR flash from Micron.

Signed-off-by: Moritz Fischer <moritz.fischer@...us.com>
---

Hi,

attached patch adds support for N25Q016a from Micron.
I have another set of changes that adds support for the 64 byte
part of this (and other N25Q Micron chips) that I'll send in follow
up patches.

Question:

Checkpatch complains about lines over 80 chars which happens all
over the place in drivers/mtd/spi-nor/spi-nor.c in the tables

Does anyone care? If so I can submit a patch that cleans that up,
as follow up.

Cheers,

Moritz

---
 drivers/mtd/spi-nor/spi-nor.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 157841d..885ab0f 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -860,6 +860,7 @@ static const struct flash_info spi_nor_ids[] = {
 	{ "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048, SPI_NOR_QUAD_READ) },
 
 	/* Micron */
+	{ "n25q016a",	 INFO(0x20bb15, 0x1000, 64 * 1024,32, SECT_4K | SPI_NOR_QUAD_READ) },
 	{ "n25q032",	 INFO(0x20ba16, 0, 64 * 1024,   64, SPI_NOR_QUAD_READ) },
 	{ "n25q032a",	 INFO(0x20bb16, 0, 64 * 1024,   64, SPI_NOR_QUAD_READ) },
 	{ "n25q064",     INFO(0x20ba17, 0, 64 * 1024,  128, SECT_4K | SPI_NOR_QUAD_READ) },
-- 
2.5.5

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ