linux-kernel - [PATCH] perf/x86/intel/uncore: Fix CHA registers configuration procedure for Knights Landing platform

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Date:	Fri,  6 May 2016 10:59:31 +0200
From:	hchrzani <hubert.chrzaniuk@...el.com>
To:	hubert.chrzaniuk@...el.com, lukasz.anaczkowski@...el.com,
	tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
	x86@...nel.org, peterz@...radead.org, kan.liang@...el.com,
	vthakkar1994@...il.com, bp@...e.de, harish.chegondi@...el.com,
	izumi.taku@...fujitsu.com, linux-kernel@...r.kernel.org
Cc:	Lawrence F Meadows <lawrence.f.meadows@...el.com>
Subject: [PATCH] perf/x86/intel/uncore: Fix CHA registers configuration procedure for Knights Landing platform

CHA events in Knights Landing platform require programming filter registers properly.
Before change, code lacked mandatory bitset operations for reserved bits.
As a result some events were not counted.

Fixes: 77af003 ('perf/x86/intel/uncore: Add Knights Landing uncore PMU support')
Signed-off-by: Hubert Chrzaniuk <hubert.chrzaniuk@...el.com>
Signed-off-by: Lawrence F Meadows <lawrence.f.meadows@...el.com>
---
 arch/x86/events/intel/uncore_snbep.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/x86/events/intel/uncore_snbep.c b/arch/x86/events/intel/uncore_snbep.c
index ab2bcaa..47d7216 100644
--- a/arch/x86/events/intel/uncore_snbep.c
+++ b/arch/x86/events/intel/uncore_snbep.c
@@ -1902,6 +1902,7 @@ static int knl_cha_hw_config(struct intel_uncore_box *box,
 		reg1->reg = HSWEP_C0_MSR_PMON_BOX_FILTER0 +
 			    KNL_CHA_MSR_OFFSET * box->pmu->pmu_idx;
 		reg1->config = event->attr.config1 & knl_cha_filter_mask(idx);
+		reg1->config |= 0x23ull << 32;
 		reg1->idx = idx;
 	}
 	return 0;
-- 
1.8.3.1