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Date:	Wed, 11 May 2016 01:15:33 +0530
From:	Anand Moon <linux.amoon@...il.com>
To:	Krzysztof Kozlowski <k.kozlowski@...sung.com>
Cc:	Kukjin Kim <kgene@...nel.org>,
	Lukasz Majewski <l.majewski@...sung.com>,
	Javier Martinez Canillas <javier@....samsung.com>,
	devicetree <devicetree@...r.kernel.org>,
	linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
	"linux-samsung-soc@...r.kernel.org" 
	<linux-samsung-soc@...r.kernel.org>,
	Linux Kernel <linux-kernel@...r.kernel.org>,
	Bartlomiej Zolnierkiewicz <b.zolnierkie@...sung.com>
Subject: Re: [PATCH] ARM: dts: exynos: Only Odroid XU3-family boards use DTSI
 with CPU thermal nodes

Hi Krzysztof,

On 10 May 2016 at 19:33, Krzysztof Kozlowski <k.kozlowski@...sung.com> wrote:
> On 05/10/2016 04:00 PM, Anand Moon wrote:
>> Hi Krzysztof,
>>
>> On 10 May 2016 at 18:13, Krzysztof Kozlowski <k.kozlowski@...sung.com> wrote:
>>> On 05/10/2016 11:29 AM, Anand Moon wrote:
>>>>>
>>>>> I am sorry but I do not understand.
>>>>> 1. Are you saying that my patch causes the issue?
>>>>> 2. Are you saying that I should not send some patches because of
>>>>> conflicting work? (that would be peculiar...)
>>>>> 3. Are you saying that I should not apply this patch to me tree because
>>>>> of conflicting work?
>>>>> 4. Other?
>>>>>
>>>>> Best regards.
>>>>> Krzysztof
>>>>>
>>>>>
>>>>
>>>> Sorry for the confusion it's not about you patch.
>>>> The feature is not working correctly as per my testing with the
>>>> original source code.
>>>> It need to be more tuned or some other approach to the issue need to found.
>>>
>>> Known issue. You don't have cpufreq cooling enabled. I sent patches for
>>> that and they are in the mainline. However cpufreq cooling requires
>>> cpufreq which cannot work with BL_SWITCHER and on Exynos542x on
>>> exynos_defconfig BL_SWITCHER is enabled.
>>>
>>> Just disable the BL_Krzysztof.
>>>
>>> Best regards,
>>> Krzysztof
>>
>> I have already disabled BL_SWITCHER in my exynos_defconfig. to support
>> CONFIG_CPUFREQ_DT.
>>
>> But how about adjust the  the cputemp so that all the core will have
>> same tip points.
>
>
> I don't understand you. All of the cores have same trip points.
>
> Best regards,
> Krzysztof
>
>>
>> xcpu0-t 0:[ 44][>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>     A50
>>      A60       P70            P85                                C120
>> ]
>> xcpu1-t 1:[ 46][>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
>>                               A85               A103   A110      C120
>> ]
>> xcpu2-t 2:[ 51][>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
>>                          A85               A103   A110      C120 ]
>> xcpu3-t 3:[ 47][>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
>>                              A85               A103   A110      C120 ]
>> xgpu-th 4:[ 48][>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>>
>>                             A85               A103   A110      C120 ]
>
>

Sorry I am not able to explain my self clearly.
But I have once gain tested these changes.

Only could you append with following changes.
--------------------------------------------------------
+                               cpu_crit0: cpu-crit-0 {
+                                       temperature = <120000>; /*
millicelsius */
+                                       hysteresis = <5000>; /* millicelsius */
+                                       type = "critical";
+                               };
--------------------------------------------------------
hysteresis time help to adjust the present and past temperature inputs
before critical shutdown.

Tested-by: Anand Moon <linux.amoon@...il.com>

Best Regards
-Anand Moon

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