linux-kernel - Re: [PATCH v3 2/3] x86/platform/p2sb: New Primary to Sideband bridge support driver for Intel SOC's

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Date:	Mon, 13 Jun 2016 16:54:31 +0300
From:	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:	Mika Westerberg <mika.westerberg@...ux.intel.com>,
	Tan Jui Nee <jui.nee.tan@...el.com>
Cc:	heikki.krogerus@...ux.intel.com, tglx@...utronix.de,
	mingo@...hat.com, hpa@...or.com, x86@...nel.org,
	ptyser@...-inc.com, lee.jones@...aro.org,
	linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
	jonathan.yong@...el.com, ong.hock.yu@...el.com,
	weifeng.voon@...el.com, wan.ahmad.zainie.wan.mohamad@...el.com
Subject: Re: [PATCH v3 2/3] x86/platform/p2sb: New Primary to Sideband
 bridge support driver for Intel SOC's

On Thu, 2016-06-09 at 17:05 +0300, Mika Westerberg wrote:
> On Tue, Jun 07, 2016 at 02:55:52PM +0800, Tan Jui Nee wrote:
> > From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> > 
> > There is already one and at least one more user coming which
> > require an access to Primary to Sideband bridge (P2SB) in order
> > to get IO or MMIO bar hidden by BIOS.
> > Create a driver to access P2SB for x86 devices.
> > 
> > Signed-off-by: Yong, Jonathan <jonathan.yong@...el.com>
> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> > ---
> >  arch/x86/Kconfig                 | 14 ++++++
> >  arch/x86/include/asm/p2sb.h      | 27 +++++++++++
> >  arch/x86/platform/intel/Makefile |  1 +
> >  arch/x86/platform/intel/p2sb.c   | 99
> > ++++++++++++++++++++++++++++++++++++++++
> >  4 files changed, 141 insertions(+)
> >  create mode 100644 arch/x86/include/asm/p2sb.h
> >  create mode 100644 arch/x86/platform/intel/p2sb.c
> > 
> > diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> > index 2dc18605..589045e 100644
> > --- a/arch/x86/Kconfig
> > +++ b/arch/x86/Kconfig
> > @@ -606,6 +606,20 @@ config IOSF_MBI_DEBUG
> >  
> >  	  If you don't require the option or are in doubt, say N.
> >  
> > +config X86_INTEL_NON_ACPI
> > +	bool "Enable support non-ACPI Intel platforms"
> > +	select PINCTRL
> > +	---help---
> > +	  Select this option to enables MMIO BAR access over the
> > P2SB for
> > +	  non-ACPI Intel SoC platforms. This driver uses the P2SB
> > hide/unhide
> > +	  mechanism cooperatively to pass the PCI BAR address to
> > the platform
> > +	  driver, currently GPIO on the following SoC products.
> > +	   - Apollo Lake
> 
> Why do we need Kconfig option for this?

In one of previous review I was wondering how we could not to build this
at all. I don't like this option either.

> 
> I think better is to make P2SB available on CPUs which have one, and
> that can be detected runtime. If P2SB is not available then p2sb_bar()
> returns -ENODEV.

Would work to me, though still the same question: is it possible to
avoid building it on even most of Intel platforms, since there, I
assume, will be not many users of the module?

-- 

Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Intel Finland Oy