linux-kernel - Re: [PATCH v3 13/14] clk: sunxi-ng: Add H3 clocks

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Date:	Thu, 30 Jun 2016 10:31:08 +0200
From:	Jean-Francois Moine <moinejf@...e.fr>
To:	Maxime Ripard <maxime.ripard@...e-electrons.com>
Cc:	Mike Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...eaurora.org>,
	Chen-Yu Tsai <wens@...e.org>, linux-clk@...r.kernel.org,
	Hans de Goede <hdegoede@...hat.com>,
	Boris Brezillon <boris.brezillon@...e-electrons.com>,
	Rob Herring <robh+dt@...nel.org>,
	Vishnu Patekar <vishnupatekar0510@...il.com>,
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
	devicetree@...r.kernel.org
Subject: Re: [PATCH v3 13/14] clk: sunxi-ng: Add H3 clocks

On Wed, 29 Jun 2016 21:05:34 +0200
Maxime Ripard <maxime.ripard@...e-electrons.com> wrote:

> +static void __init sun8i_h3_ccu_setup(struct device_node *node)
> +{
> +	void __iomem *reg;
> +	u32 val;
> +
> +	reg = of_io_request_and_map(node, 0, of_node_full_name(node));
> +	if (IS_ERR(reg)) {
> +		pr_err("%s: Could not map the clock registers\n",
> +		       of_node_full_name(node));
> +		return;
> +	}
> +
> +	/* Force the PLL-Audio-1x divider to 4 */
> +	val = readl(reg + SUN8I_H3_PLL_AUDIO_REG);
> +	val &= ~GENMASK(4, 0);
> +	writel(val | 3, reg + SUN8I_H3_PLL_AUDIO_REG);
> +
> +	sunxi_ccu_probe(node, reg, &sun8i_h3_ccu_desc);
> +}

FYI, the pll-audio PLL_POST_DIV is 19:16.

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Jef		|		http://moinejf.free.fr/