linux-kernel - Re: [PATCH v1 1/1] x86/pci: Use MRFLD abbreviation for Merrifield

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Wed, 13 Jul 2016 09:24:35 +0200
From:	Ingo Molnar <mingo@...nel.org>
To:	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
	Bjorn Helgaas <bhelgaas@...gle.com>
Cc:	Ingo Molnar <mingo@...hat.com>, "H. Peter Anvin" <hpa@...or.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	linux-kernel@...r.kernel.org, x86@...nel.org
Subject: Re: [PATCH v1 1/1] x86/pci: Use MRFLD abbreviation for Merrifield


Bjorn, we already have a few incidental changes to arch/x86/pci/intel_mid_pci.c 
pending in the tip:x86/platform tree:

e99a0745bdf8 x86/pci, x86/platform/intel_mid_pci: Remove duplicate power off code
5823d0893ec2 x86/platform/intel-mid: Add Power Management Unit driver
bb27570525a7 x86/platform/intel_mid_pci: Rework IRQ0 workaround

mind if I carry this patch too, or would you like to carry it in the PCI tree?

Thanks,

	Ingo

* Andy Shevchenko <andriy.shevchenko@...ux.intel.com> wrote:

> Everywhere in the kernel the MRFLD is used as abbreviation of Intel Merrifield.
> Do the same in intel_mid_pci.c module.
> 
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> ---
>  arch/x86/pci/intel_mid_pci.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c
> index 5413d6a..5a18aed 100644
> --- a/arch/x86/pci/intel_mid_pci.c
> +++ b/arch/x86/pci/intel_mid_pci.c
> @@ -36,8 +36,8 @@
>  #define PCIE_CAP_OFFSET	0x100
>  
>  /* Quirks for the listed devices */
> -#define PCI_DEVICE_ID_INTEL_MRFL_MMC	0x1190
> -#define PCI_DEVICE_ID_INTEL_MRFL_HSU	0x1191
> +#define PCI_DEVICE_ID_INTEL_MRFLD_MMC	0x1190
> +#define PCI_DEVICE_ID_INTEL_MRFLD_HSU	0x1191
>  
>  /* Fixed BAR fields */
>  #define PCIE_VNDR_CAP_ID_FIXED_BAR 0x00	/* Fixed BAR (TBD) */
> @@ -229,7 +229,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
>  			 * Skip HS UART common registers device since it has
>  			 * IRQ0 assigned and not used by the kernel.
>  			 */
> -			if (dev->device == PCI_DEVICE_ID_INTEL_MRFL_HSU)
> +			if (dev->device == PCI_DEVICE_ID_INTEL_MRFLD_HSU)
>  				return -EBUSY;
>  			/*
>  			 * TNG has IRQ0 assigned to eMMC controller. But there
> @@ -238,7 +238,7 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
>  			 * eMMC gets it. The rest of devices still could be
>  			 * enabled without interrupt line being allocated.
>  			 */
> -			if (dev->device != PCI_DEVICE_ID_INTEL_MRFL_MMC)
> +			if (dev->device != PCI_DEVICE_ID_INTEL_MRFLD_MMC)
>  				return 0;
>  		}
>  		break;
> -- 
> 2.8.1
>