linux-kernel - Re: [PATCH 1/2] i2c: qup: Cleared the error bits in ISR

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Fri, 15 Jul 2016 15:33:18 +0900
From:	Wolfram Sang <wsa@...-dreams.de>
To:	Abhishek Sahu <absahu@...eaurora.org>
Cc:	agross@...eaurora.org, sricharan@...eaurora.org,
	architt@...eaurora.org, linux-arm-msm@...r.kernel.org,
	ntelkar@...eaurora.org, linux-kernel@...r.kernel.org,
	andy.gross@...aro.org, linux-i2c@...r.kernel.org,
	dmaengine@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 1/2] i2c: qup: Cleared the error bits in ISR

On Mon, May 09, 2016 at 06:14:30PM +0530, Abhishek Sahu wrote:
> 1. Current QCOM I2C driver hangs when sending data to address 0x03-0x07
> in some scenarios. The QUP controller generates invalid write in this
> case, since these addresses are reserved for different bus formats.
> 
> 2. Also, the error handling is done by I2C QUP ISR in the case of DMA
> mode. The state need to be RESET in case of any error for clearing the
> available data in FIFO, which otherwise leaves the BAM DMA controller
> in hang state.
> 
> This patch fixes the above two issues by clearing the error bits from
> I2C and QUP status in ISR in case of I2C error, QUP error and resets
> the QUP state to clear the FIFO data.
> 
> Signed-off-by: Abhishek Sahu <absahu@...eaurora.org>

Applied to for-next, thanks!


Download attachment "signature.asc" of type "application/pgp-signature" (820 bytes)