lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Fri, 29 Jul 2016 23:24:50 +0200
From:	Rafał Miłecki <zajec5@...il.com>
To:	Mark Rutland <mark.rutland@....com>
Cc:	Michael Turquette <mturquette@...libre.com>,
	Stephen Boyd <sboyd@...eaurora.org>, linux-clk@...r.kernel.org,
	bcm-kernel-feedback-list <bcm-kernel-feedback-list@...adcom.com>,
	Rafał Miłecki <rafal@...ecki.pl>,
	Rob Herring <robh+dt@...nel.org>,
	Pawel Moll <pawel.moll@....com>,
	Ian Campbell <ijc+devicetree@...lion.org.uk>,
	Kumar Gala <galak@...eaurora.org>,
	Florian Fainelli <f.fainelli@...il.com>,
	Jon Mason <jonmason@...adcom.com>,
	Eric Anholt <eric@...olt.net>,
	Stephen Warren <swarren@...dotorg.org>,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@...r.kernel.org>,
	open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] clk: bcm: Add driver for Northstar ILP clock

On 29 July 2016 at 15:15, Mark Rutland <mark.rutland@....com> wrote:
> On Fri, Jul 29, 2016 at 02:58:32PM +0200, Rafał Miłecki wrote:
>> From: Rafał Miłecki <rafal@...ecki.pl>
>>
>> This clock is present on cheaper Northstar devices like BCM53573 or
>> BCM47189 using Corex-A7. This driver uses PMU (Power Management Unit)
>> to calculate clock rate and allows using it in a generic (clk_*) way.
>>
>> Signed-off-by: Rafał Miłecki <rafal@...ecki.pl>
>> ---
>>  .../devicetree/bindings/clock/brcm,ns-ilp.txt      |  28 ++++
>>  drivers/clk/bcm/Makefile                           |   1 +
>>  drivers/clk/bcm/clk-ns-ilp.c                       | 146 +++++++++++++++++++++
>>  3 files changed, 175 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>>  create mode 100644 drivers/clk/bcm/clk-ns-ilp.c
>>
>> diff --git a/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>> new file mode 100644
>> index 0000000..c4df38e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/brcm,ns-ilp.txt
>> @@ -0,0 +1,28 @@
>> +Broadcom Northstar ILP clock
>> +============================
>> +
>> +This binding uses the common clock binding:
>> +    Documentation/devicetree/bindings/clock/clock-bindings.txt
>> +
>> +This binding is used for ILP clock on Broadcom Northstar devices using
>> +Corex-A7 CPU. ILP clock depends on ALP one and has to be calculated on
>> +runtime.
>> +
>> +Required properties:
>> +- compatible: "brcm,ns-ilp"
>> +- reg: iomem address range of PMU (Power Management Unit)
>> +- reg-names: "pmu", the only needed & supported reg right now
>
> From the commit message and binding description, it sounds like there
> should be a binding for the PMU, and that should cover the clocks
> required/exported by the PMU.

This is a bit of problem, because PMU handles a lot of different stuff
and is used by various drivers. Some examples of what you can do
with/find on a PMU:
1) Power management
2) Watchdog
3) Timer
4) XTAL
5) PLLs
6) Control registers for some ARM debugging (whatever it is), UART, JTAG, more

PMU is used by different drivers, e.g.:
1) Ethernet driver
2) Wireless driver
3) NAND controller driver

I don't have access to Broadcom's datasheets so unfortunately I can't
provide all details.


>> +- clocks: should reference an ALP clock
>> +- clock-names: "alp", the only needed & supported clock right now
>> +- #clock-cells: should be <0>
>
> How many clocks does the PMU output, including the ILP clock?

Well, ALP clock (AKA XTAL clock) is definitely part of PMU. It's a
fixed rate clock with rate specific to the chip.

I think ILP is also part of PMU (again: I don't have datasheets) as
PMU has this ALP_PER_4ILP register.

>From Broadcom's SDK I can say they also have "ARM debug unit" on some
chipsets. It requires enabling "ARM debug clk" to operate which is
handled by PMU as well.

-- 
Rafał

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ