linux-kernel - Re: [PATCH 3/4] ARM: dts: da850-lcdk: Add NAND to DT

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Date:	Wed, 10 Aug 2016 11:19:44 +0000
From:	Karl Beldan <kbeldan@...libre.com>
To:	Sekhar Nori <nsekhar@...com>
Cc:	devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
	Mark Rutland <mark.rutland@....com>,
	Russell King <linux@...linux.org.uk>,
	Santosh Shilimkar <ssantosh@...nel.org>,
	Kevin Hilman <khilman@...libre.com>,
	Karl Beldan <karl.beldan+oss@...il.com>
Subject: Re: [PATCH 3/4] ARM: dts: da850-lcdk: Add NAND to DT

On Wed, Aug 10, 2016 at 03:01:30PM +0530, Sekhar Nori wrote:
> On Wednesday 10 August 2016 02:34 PM, Karl Beldan wrote:
> > On Wed, Aug 10, 2016 at 02:01:57PM +0530, Sekhar Nori wrote:
> >> On Tuesday 09 August 2016 10:45 PM, Karl Beldan wrote:
> >>> This adds DT support for the NAND connected to the SoC AEMIF.
> >>> The parameters (timings, ecc) are the same as what the board ships with
> >>> (default AEMIF timings, 1bit ECC) and improvements will be handled in
> >>> due course.
> >>
> >> I disagree that we need to be compatible to the software that ships with
> >> the board. Thats software was last updated 3 years ago. Instead I would
> >> concern with what the hardware supports. So, if the hardware can support
> >> 4-bit ECC, I would use that.
> >>
> > I am not saying we _need_ to be compatible.
> 
> Alright then, please drop references to what software the board ships
> with in the commit message and in the patch itself.
> 

I hadn't seen this comment before sending v2.

> > 
> >> If driver is broken for 4-bit ECC, please fix that up first.
> >>
> > Since this issue is completely separate from my DT improvements
> > I'll stick to resubmitting the series, applying my LCDK changes to the
> > EVM too, besides you'll be able to compare the behavior without ECC
> > discrepancies.
> > I took note that you are likely to not apply without the ECC fix.
> 
> Yeah, I would not like to apply with 1-bit ECC now and then change to
> 4-bit ECC soon after.
> 

Both mityomapl138 from mainline and hawkboard from TI's BSP release
include the comment:
- "4 bit mode is not supported with 16 bit NAND"
It is not clear whether they imply that the HW has issues or if it's SW
only, but 4-bits ECC is a different matter and I hope you'll integrate
the current changes prior to tackling it.
 
Karl