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Date: Wed, 24 Aug 2016 11:29:39 -0700
From: Douglas Anderson <dianders@...omium.org>
To: Heiko Stuebner <heiko@...ech.de>
Cc: linux-rockchip@...ts.infradead.org, zhengxing@...k-chips.com,
Douglas Anderson <dianders@...omium.org>,
mturquette@...libre.com, sboyd@...eaurora.org,
linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: [PATCH] clk: rockchip: mark aclk_emmc_noc as a critical clock on rk3399
From: Xing Zheng <zhengxing@...k-chips.com>
We don't have code to handle any of the noc clocks in rk3399 and they're
all just listed as critical clocks. Let's do the same for
aclk_emmc_noc.
Without this clock being marked as critical we have problems around
suspend/resume after commit 20c389e656a8 ("clk: rockchip: fix incorrect
aclk_emmc source gate bits on rk3399"). Before that change we were
presumably not actually gating any of these clocks because we were
setting the wrong gate.
Signed-off-by: Xing Zheng <zhengxing@...k-chips.com>
Signed-off-by: Douglas Anderson <dianders@...omium.org>
---
drivers/clk/rockchip/clk-rk3399.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/rockchip/clk-rk3399.c b/drivers/clk/rockchip/clk-rk3399.c
index e445cd64952a..ede6c475b537 100644
--- a/drivers/clk/rockchip/clk-rk3399.c
+++ b/drivers/clk/rockchip/clk-rk3399.c
@@ -1489,6 +1489,7 @@ static const char *const rk3399_cru_critical_clocks[] __initconst = {
"hclk_perilp1",
"hclk_perilp1_noc",
"aclk_dmac0_perilp",
+ "aclk_emmc_noc",
"gpll_hclk_perilp1_src",
"gpll_aclk_perilp0_src",
"gpll_aclk_perihp_src",
--
2.8.0.rc3.226.g39d4020
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