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Date:   Fri, 26 Aug 2016 16:49:53 -0400 (EDT)
From:   Vince Weaver <vince@...ter.net>
To:     Alexander Shishkin <alexander.shishkin@...ux.intel.com>
cc:     Peter Zijlstra <a.p.zijlstra@...llo.nl>,
        Ingo Molnar <mingo@...hat.com>, linux-kernel@...r.kernel.org,
        eranian@...gle.com, Arnaldo Carvalho de Melo <acme@...radead.org>
Subject: Re: [PATCH 1/3] perf/x86/intel/bts: Fix confused ordering of PMU
 callbacks

On Wed, 24 Aug 2016, Alexander Shishkin wrote:

> Alexander Shishkin <alexander.shishkin@...ux.intel.com> writes:
> 
> > Alexander Shishkin <alexander.shishkin@...ux.intel.com> writes:
> >
> >> Signed-off-by: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
> >
> > Ok, this one is broken, please disregard.
> 
> Vince, can you try the following (with the other two in this series)?
> 

Sorry for the delay.  Not sure if testing was still needed (or if it was 
superceded by Will Deacon's patch) but I ran the fuzzer for a few hours 
with this patch and the other two applied and didn't see any of the NMI 
errors that I saw with the original patch.

Vince

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