lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Thu, 15 Sep 2016 08:17:07 +0800
From:   Wanpeng Li <kernellwp@...il.com>
To:     Paolo Bonzini <pbonzini@...hat.com>
Cc:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        kvm <kvm@...r.kernel.org>, Wanpeng Li <wanpeng.li@...mail.com>,
        Radim Krčmář <rkrcmar@...hat.com>,
        Wincy Van <fanwenyi0529@...il.com>,
        Yang Zhang <yang.zhang.wz@...il.com>
Subject: Re: [PATCH] KVM: VMX: Enable MSR-BASED TPR shadow even if w/o APICv

2016-09-15 8:07 GMT+08:00 Wanpeng Li <kernellwp@...il.com>:
> 2016-09-14 17:40 GMT+08:00 Paolo Bonzini <pbonzini@...hat.com>:
>>
>>
>> On 14/09/2016 09:58, Wanpeng Li wrote:
>>> From: Wanpeng Li <wanpeng.li@...mail.com>
>>>
>>> I observed that kvmvapic(to optimize flexpriority=N or AMD) is used
>>> to boost TPR access when testing kvm-unit-test/eventinj.flat tpr case
>>> on my haswell desktop (w/ flexpriority, w/o APICv). Commit (8d14695f9542
>>> x86, apicv: add virtual x2apic support) disable virtual x2apic mode
>>> completely if w/o APICv, and the author also told me that windows guest
>>> can't enter into x2apic mode when he developed the APICv feature several
>>> years ago. However, it is not truth currently, Interrupt Remapping and
>>> vIOMMU is added to qemu and the developers from Intel test windows 8 can
>>> work in x2apic mode w/ Interrupt Remapping enabled recently.
>>>
>>> This patch enables TPR shadow for virtual x2apic mode to boost
>>> windows guest in x2apic mode even if w/o APICv.
>>>
>>> Can pass the kvm-unit-test.
>>
>> Ok, now I see what you meant; this actually makes sense.  I don't expect
>> much speedup though, because Linux doesn't touch the TPR and Windows is
>> likely going to use the Hyper-V APIC MSRs when APICv is disabled.  For
>> this reason I'm not sure if the patch is useful in practice.
>
> We should use more newer windows guests which have Hyper-V synthetic
> interrupt support, however, older windows guests can't get benefit.
>
>>
>> To test this patch, you have to run kvm-unit-tests with Hyper-V
>> synthetic interrupt enabled.  Did you do this?
>
> qemu-system-x86_64 -enable-kvm -machine kernel_irqchip=split -cpu
> kvm64,hv_synic -device pc-testdev -device
> isa-debug-exit,iobase=0xf4,iosize=0x4 -vnc none -serial stdio -device
> pci-testdev -kernel x86/hyperv_synic.flat
> enabling apic
> paging enabled
> cr0 = 80010011
> cr3 = 7fff000
> cr4 = 20
> enabling apic
> ncpus = 1
> prepare
> test 0 -> 0
>
> I run ./x86-run x86/hyperv_synic.flat against latest linus tree, it
> just stuck here.

Oops, I miss the "-device hyperv-testdev" parameter. And the patch
passes the hyperv_sync.flat test case.

Regards,
Wanpeng Li

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ