linux-kernel - Re: [PATCH] usb: dwc2: add USBTrdTim to initial value

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Date:   Thu, 22 Sep 2016 17:58:06 -0700
From:   John Youn <John.Youn@...opsys.com>
To:     Pengcheng Li <lpc.li@...ilicon.com>,
        "John.Youn@...opsys.com" <John.Youn@...opsys.com>
CC:     "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
        "linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "xuejiancheng@...ilicon.com" <xuejiancheng@...ilicon.com>,
        "lidongpo@...ilicon.com" <lidongpo@...ilicon.com>,
        "caizhiyong@...ilicon.com" <caizhiyong@...ilicon.com>,
        Felipe Balbi <balbi@...nel.org>
Subject: Re: [PATCH] usb: dwc2: add USBTrdTim to initial value

On 9/21/2016 6:43 PM, Pengcheng Li wrote:
> After dwc2_core_reset，register is to the initial value, and the USBTrdTim
> vale is 0x5. If hsotg->phyif = GUSBCFG_PHYIF8, after the dwc2_writel,the
> value is 0xd.So we need to set the USBTrdTim to 0.

[++ Felipe]


Looks good. But please clean up the subject and message

Subject:

usb: dwc2: Clear GUSBCFG.UsbTrdTim before setting

Description:

The USBTRDTIM field needs to be cleared before setting a new
value. Otherwise it will result in an incorrect value if
phyif == GUSBCFG_PHYIF8.


With that
Acked-by: John Youn <johnyoun@...opsys.com>


Thanks,
John


> 
> Signed-off-by: Pengcheng Li <lpc.li@...ilicon.com>
> ---
>  drivers/usb/dwc2/gadget.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/usb/dwc2/gadget.c b/drivers/usb/dwc2/gadget.c
> index af46adf..9e52e4f 100644
> --- a/drivers/usb/dwc2/gadget.c
> +++ b/drivers/usb/dwc2/gadget.c
> @@ -2531,7 +2531,7 @@ void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
>  	/* keep other bits untouched (so e.g. forced modes are not lost) */
>  	usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
>  	usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
> -		GUSBCFG_HNPCAP);
> +		GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
>  
>  	/* set the PLL on, remove the HNP/SRP and set the PHY */
>  	val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
> @@ -3413,7 +3413,7 @@ static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg)
>  	/* keep other bits untouched (so e.g. forced modes are not lost) */
>  	usbcfg = dwc2_readl(hsotg->regs + GUSBCFG);
>  	usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP |
> -		GUSBCFG_HNPCAP);
> +		GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK);
>  
>  	/* set the PLL on, remove the HNP/SRP and set the PHY */
>  	trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5;
>