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date:   Mon, 26 Sep 2016 09:58:26 +0100
from:   "Peter Senna Tschudin" <peter.senna@...labora.co.uk>
to:     "Archit Taneja" <architt@...eaurora.org>
cc:     galak@...eaurora.org, thierry.reding@...il.com,
        kernel@...gutronix.de, "Rob Herring" <robh@...nel.org>,
        ykk@...k-chips.com, jslaby@...e.cz, tiwai@...e.com,
        eballetbo@...il.com, devicetree@...r.kernel.org,
        shawnguo@...nel.org, linux@...ck-us.net, davem@...emloft.net,
        p.zabel@...gutronix.de, peter.senna@...il.com,
        daniel.vetter@...ll.ch, enric.balletbo@...labora.com,
        "Peter Senna Tschudin" <peter.senna@...labora.com>,
        javier@...hile0.org, dri-devel@...ts.freedesktop.org,
        linux-kernel@...r.kernel.org, pawel.moll@....com,
        ijc+devicetree@...lion.org.uk, martin.donnelly@...com,
        linux@...linux.org.uk, heiko@...ech.de, mark.rutland@....com,
        akpm@...ux-foundation.org, airlied@...ux.ie,
        "Fabio Estevam" <fabio.estevam@....com>, mchehab@....samsung.com,
        linux-arm-kernel@...ts.infradead.org, robh+dt@...nel.org,
        martyn.welch@...labora.co.uk, gregkh@...uxfoundation.org,
        treding@...dia.com, rmk+kernel@...linux.org.uk
subject: Re: [PATCH V5 3/4] drm/bridge: Add driver for GE B850v3 
 LVDS/DP++ Bridge

 Hi Archit,

On Monday, September 26, 2016 10:31 CEST, Archit Taneja <architt@...eaurora.org> wrote: 
 
> Hi Peter,
> 
> On 09/26/2016 01:57 PM, Peter Senna Tschudin wrote:
> > Patch 1/4 is already on linux-next, but what about this one? Ping?
> 
> I'd posted some queries a couple of times which you didn't answer to.
> Could you please respond to them before we try to get this merged?

Your queries were already answered by similar questions. The commit messages and cover letter also addresses the design decisions of the code. But basically the driver usefulness to other scenarios is severely limited by the firmware used by both chips. And when using the firmware that goes with this specific hardware, then yes, the two chips are always expected to work together. But the main point is that with the custom firmware each chip do not behave as independent bridges anymore.

On the other side, I was careful to use meaningful names for the registers, so a future implementation based on same chips can take the basics from this work, at least as a starting point.

Thanks,

Peter

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