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Date:   Thu, 27 Oct 2016 18:38:46 -0700
From:   Stephen Boyd <sboyd@...eaurora.org>
To:     gabriel.fernandez@...com
Cc:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Russell King <linux@...linux.org.uk>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Alexandre Torgue <alexandre.torgue@...com>,
        Michael Turquette <mturquette@...libre.com>,
        Nicolas Pitre <nico@...aro.org>, Arnd Bergmann <arnd@...db.de>,
        daniel.thompson@...aro.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, ludovic.barre@...com,
        olivier.bideau@...com, amelie.delaunay@...com
Subject: Re: [PATCH v3 1/3] clk: stm32f4: Add LSI & LSE clocks

On 10/21, gabriel.fernandez@...com wrote:
> From: Gabriel Fernandez <gabriel.fernandez@...com>
> 
> This patch introduces the support of the LSI & LSE clocks.
> The clock drivers needs to disable the power domain write protection
> using syscon/regmap to enable these clocks.
> 
> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@...com>
> ---

Applied to clk-next + 

diff --git a/drivers/clk/clk-stm32f4.c b/drivers/clk/clk-stm32f4.c
index c2661e28eeda..5eb05dbf59b8 100644
--- a/drivers/clk/clk-stm32f4.c
+++ b/drivers/clk/clk-stm32f4.c
@@ -224,7 +224,7 @@ static const u64 stm32f46xx_gate_map[MAX_GATE_MAP] = { 0x000000f17ef417ffull,
 						       0x0000000000000003ull,
 						       0x0c777f33f6fec9ffull };
 
-const u64 *stm32f4_gate_map;
+static const u64 *stm32f4_gate_map;
 
 static struct clk_hw **clks;
 

-- 
Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
a Linux Foundation Collaborative Project

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