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Date: Sat, 29 Oct 2016 09:50:07 -0400
From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
To: linux-kernel@...r.kernel.org
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
stable@...r.kernel.org, Tang Yuantian <yuantian.tang@....com>,
Scott Wood <oss@...error.net>,
Stephen Boyd <sboyd@...eaurora.org>
Subject: [PATCH 4.8 089/125] clk: qoriq: fix a register offset error
4.8-stable review patch. If anyone has any objections, please let me know.
------------------
From: Tang Yuantian <Yuantian.Tang@....com>
commit 8964193f6bfda5c4cf14eedb7e94892c1f1c34f0 upstream.
The offset of Core Cluster clock control/status register
on cluster group V3 version is different from others, and
should be plus 0x70000.
Signed-off-by: Tang Yuantian <yuantian.tang@....com>
Reviewed-by: Scott Wood <oss@...error.net>
Fixes: 9e19ca2f627e ("clk: qoriq: Add ls2080a support.")
Signed-off-by: Stephen Boyd <sboyd@...eaurora.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@...uxfoundation.org>
---
drivers/clk/clk-qoriq.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
--- a/drivers/clk/clk-qoriq.c
+++ b/drivers/clk/clk-qoriq.c
@@ -766,7 +766,11 @@ static struct clk * __init create_one_cm
if (!hwc)
return NULL;
- hwc->reg = cg->regs + 0x20 * idx;
+ if (cg->info.flags & CG_VER3)
+ hwc->reg = cg->regs + 0x70000 + 0x20 * idx;
+ else
+ hwc->reg = cg->regs + 0x20 * idx;
+
hwc->info = cg->info.cmux_groups[cg->info.cmux_to_group[idx]];
/*
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