linux-kernel - Re: [PATCH v4 2/2] fpga: Add support for Lattice iCE40 FPGAs

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Mon, 31 Oct 2016 10:04:45 -0700
From:   Moritz Fischer <moritz.fischer@...us.com>
To:     Joel Holdsworth <joel@...webreathe.org.uk>
Cc:     Rob Herring <robh@...nel.org>,
        Alan Tull <atull@...nsource.altera.com>,
        Devicetree List <devicetree@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-spi@...r.kernel.org
Subject: Re: [PATCH v4 2/2] fpga: Add support for Lattice iCE40 FPGAs

On Mon, Oct 31, 2016 at 9:58 AM, Joel Holdsworth
<joel@...webreathe.org.uk> wrote:
> Hi Rob,
>
> Thanks for taking the time review the patches.
>
>>>  .../bindings/fpga/lattice-ice40-fpga-mgr.txt       |  23 +++
>>
>>
>> It's preferred that bindings are a separate patch.
>
>
> Can you just clarify a little? I'm happy to split the patch up, but I don't
> understand how it could work without the bindings. For example, in
> ice40_fpga_probe, I have to get the GPIOs with devm_gpiod_get for the driver
> to work.
>
> Maybe I'm missing something. Or do you just mean the documentation?

In general, the bindings go in a separate patch, that goes *before*
the code that uses it.
That way you're guaranteed it's there if you apply the series in order.

So [1/2] would be your bindings (ice40-fpga-mgr.txt) and [2/2] would
be your driver.

>
>
>>
>> -gpios is preferred.
>>
>> Please state direction and polarity.
>
>
> Thanks, I'll fix that up.
>
>>
>>> +- creset_b-gpio:       GPIO connected to CRESET_B pin. Note that
>>> CRESET_B is
>>
>>
>> Don't use '_'. In this case, I'd just do cresetb-gpios.
>
>
> So the pin is called CRESET_B in the datasheet. I think the _B refers to the
> active-low polarity of the line.
>
> So I would think it should be creset-b-gpios or creset-gpios. I'm not so
> convinced cresetb-gpios is ideal, but it's a minor point.
>
>>
>>> +                       treated as an active-low output because the
>>> signal is
>>> +                       treated as an enable signal, rather than a reset.
>>> This
>>
>>
>> Though for enable signals, enable-gpios is fairly standard even if that
>> deviates from the pin name.
>
>
> I would think that would just confuse the user, unless they dig out the
> binding docs. The FPGA doesn't have an enable pin, and it's not at all
> obvious that a "reset" pin means "enable" in this driver.

That's why you have the binding docs ;-)

Cheers,

Moritz